STM8L151K2 STMicroelectronics, STM8L151K2 Datasheet - Page 43

• Manufacturer Part Number: STM8L151K2
• Description: STM8L-Ultra Low Power-8 bits Microcontrollers
• Manufacturer: STMicroelectronics

Specifications of STM8L151K2

• Operating Power Supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
• Temperature Range: -40 to 85 or 125 °C
• 5 Low Power Modes: Wait, Low power run, Low power wait, Active-halt with RTC, Halt
• Ultralow Leakage Per I/0: 50 nA
• Fast Wakeup From Halt: 5 μs
• Max Freq: 16 MHz, 16 CISC MIPS peak

STM8L151x2, STM8L151x3
Table 8.
0x00 52EA
0x00 52E0
0x00 52E1
0x00 52E2
0x00 52E3
0x00 52E4
0x00 52E5
0x00 52E6
0x00 52E7
0x00 52E8
0x00 52E9
0x00 52FE
0x00 52FF
0x00 534A
0x00 534B
0x00 534C
0x00 534D
0x00 534E
0x00 5317
0x00 533F
0x00 5340
0x00 5341
0x00 5342
0x00 5343
0x00 5344
0x00 5345
0x00 5346
0x00 5347
0x00 5348
0x00 5349
0x00 534F
0x00 5350
0x00 5351
Address
to
to
General hardware register map (continued)
Block
IRTIM
ADC1
TIM4
ADC1_TRIGR1
ADC1_TRIGR2
ADC1_TRIGR3
ADC1_TRIGR4
Register label
ADC1_HTRH
ADC1_SQR1
ADC1_SQR2
ADC1_SQR3
ADC1_SQR4
TIM4_SMCR
ADC1_HTRL
TIM4_CNTR
TIM4_PSCR
ADC1_LTRH
ADC1_LTRL
ADC1_DRH
ADC1_CR1
ADC1_CR2
ADC1_CR3
ADC1_DRL
TIM4_DER
TIM4_EGR
TIM4_ARR
TIM4_CR1
TIM4_CR2
TIM4_SR1
ADC1_SR
TIM4_IER
IR_CR
Doc ID 018780 Rev 3
Reserved area (21 bytes)
Reserved area (41 bytes)
TIM4 DMA1 request enable register
ADC1 channel sequence 1 register
ADC1 channel sequence 2 register
ADC1 channel sequence 3 register
ADC1 channel sequence 4 register
ADC1 high threshold register high
TIM4 Slave mode control register
ADC1 high threshold register low
ADC1 low threshold register high
ADC1 low threshold register low
TIM4 Event generation register
TIM4 Interrupt enable register
ADC1 configuration register 1
ADC1 configuration register 2
ADC1 configuration register 3
TIM4 Auto-reload register
ADC1 data register high
TIM4 prescaler register
Infrared control register
ADC1 data register low
ADC1 trigger disable 1
ADC1 trigger disable 2
ADC1 trigger disable 3
ADC1 trigger disable 4
TIM4 control register 1
TIM4 control register 2
TIM4 status register 1
ADC1 status register
Register name
TIM4 counter
Memory and register map
Reset status
0xFF
0x00
0x00
0x00
0x00
0x00
0x1F
0x00
0x0F
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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