STM8S007C8 STMicroelectronics, STM8S007C8 Datasheet - Page 31

• Manufacturer Part Number: STM8S007C8
• Description: Value line, 24 MHz STM8S 8-bit MCU, 64 Kbytes Flash, true data EEPROM
• Manufacturer: STMicroelectronics

Specifications of STM8S007C8

• Max Fcpu: up to 24 MHz, 0 wait states @ fCPU≤ 16 MHz
• Program: 64 Kbytes Flash; data retention 20 years at 55 °C after 100 cycles
• Data: 128 bytes true data EEPROM; endurance 100 kcycles
• Ram: 6 Kbytes
• Advanced Control Timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

STM8S007C8
Table 8.
0x00 521E to
0x00 523B to
0x00 524A to
0x00 521A
0x00 521B
0x00 521C
0x00 521D
0x00 523A
0x00 5216
0x00 5217
0x00 5218
0x00 5219
0x00 522F
0x00 5230
0x00 5231
0x00 5232
0x00 5233
0x00 5234
0x00 5235
0x00 5236
0x00 5237
0x00 5238
0x00 5239
0x00 523F
0x00 5240
0x00 5241
0x00 5242
0x00 5243
0x00 5244
0x00 5245
0x00 5246
0x00 5247
0x00 5248
0x00 5249
0x00 524F
Address
General hardware register map (continued)
UART1
UART3
Block
I
2
C
Register label
UART1_PSCR
UART1_BRR1
UART1_BRR2
UART3_BRR1
UART3_BRR2
I2C_TRISER
UART1_GTR
UART1_CR1
UART1_CR2
UART1_CR3
UART1_CR4
UART1_CR5
UART3_CR1
UART3_CR2
UART3_CR3
UART3_CR4
UART3_CR6
UART1_DR
UART3_DR
UART1_SR
UART3_SR
I2C_CCRH
I2C_CCRL
I2C_SR1
I2C_SR2
I2C_SR3
I2C_ITR
I2C_DR
Doc ID 022171 Rev 2
Reserved area (18 bytes)
Reserved area (5 bytes)
Reserved area (6 bytes)
I
I
2
I
UART1 baud rate register 1
UART1 baud rate register 2
UART3 baud rate register 1
UART3 baud rate register 2
2
UART1 guard time register
2
C clock control register high
C clock control register low
UART1 prescaler register
UART1 control register 1
UART1 control register 2
UART1 control register 3
UART1 control register 4
UART1 control register 5
UART3 control register 1
UART3 control register 2
UART3 control register 3
UART3 control register 4
UART3 control register 6
C interrupt control register
UART1 status register
UART3 status register
UART1 data register
UART3 data register
I
I
I
Reserved
2
2
2
I
2
C status register 1
C status register 2
C status register 3
I
Register name
C TRISE register
2
C data register
Memory and register map
status
Reset
0xC0
0xXX
0xXX
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x02
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
C0h
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