ST72561R9-Auto STMicroelectronics, ST72561R9-Auto Datasheet - Page 140

• Manufacturer Part Number: ST72561R9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561R9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

8-bit timer (TIM8)
13.7.2
140/324
Bit 4 = FOLV2 Forced Output Compare 2.
This bit is set and cleared by software.
Bit 3 = FOLV1 Forced Output Compare 1.
This bit is set and cleared by software.
Bit 2 = OLVL2 Output Level 2.
This bit is copied to the OCMP2 pin whenever a successful comparison occurs with the
OC2R register and OCxE is set in the CR2 register. This value is copied to the OCMP1 pin
in One Pulse Mode and Pulse Width Modulation mode.
Bit 1 = IEDG1 Input Edge 1.
This bit determines which type of level transition on the ICAP1 pin will trigger the capture.
Bit 0 = OLVL1 Output Level 1.
The OLVL1 bit is copied to the OCMP1 pin whenever a successful comparison occurs with
the OC1R register and the OC1E bit is set in the CR2 register.
Control register 2 (CR2)
Read/ write
Reset value: 0000 0000 (00h)
Bit 7 = OC1E Output Compare 1 Pin Enable.
This bit is used only to output the signal from the timer on the OCMP1 pin (OLV1 in Output
Compare mode, both OLV1 and OLV2 in PWM and one-pulse mode). Whatever the value of
the OC1E bit, the Output Compare 1 function of the timer remains active.
Bit 6 = OC2E Output Compare 2 Pin Enable.
This bit is used only to output the signal from the timer on the OCMP2 pin (OLV2 in Output
Compare mode). Whatever the value of the OC2E bit, the Output Compare 2 function of the
timer remains active.
Bit 5 = OPM One Pulse Mode.
OC1E
0: No effect on the OCMP2 pin.
1:Forces the OLVL2 bit to be copied to the OCMP2 pin, if the OC2E bit is set and even
if there is no successful comparison.
0: No effect on the OCMP1 pin.
1: Forces OLVL1 to be copied to the OCMP1 pin, if the OC1E bit is set and even if there
is no successful comparison.
0: A falling edge triggers the capture.
1: A rising edge triggers the capture.
0: OCMP1 pin alternate function disabled (I/O pin free for general-purpose I/O).
1: OCMP1 pin alternate function enabled.
0: OCMP2 pin alternate function disabled (I/O pin free for general-purpose I/O).
1: OCMP2 pin alternate function enabled.
0: One Pulse Mode is not active.
1: One Pulse Mode is active, the ICAP1 pin can be used to trigger one pulse on the
OCMP1 pin; the active transition is given by the IEDG1 bit. The length of the generated
pulse depends on the contents of the OC1R register.
7
OC2E
OPM
Doc ID 12370 Rev 8
PWM
CC1
CC0
IEDG2
ST72561-Auto
0
0