ST72321R9-Auto STMicroelectronics, ST72321R9-Auto Datasheet - Page 150

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ST72321R9-Auto

Manufacturer Part Number
ST72321R9-Auto
Description
8-bit MCU for automotive with 60 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72321R9-Auto

Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
Serial communications interface (SCI)
15.7.3
150/243
Table 74.
Control register 2 (SCICR2)
Table 75.
SCICR2
Bit Name
Bit
7
6
5
4
3
0
RW
TIE
7
TCIE
Name
ILIE
RIE
TIE
TE
PIE
Transmitter interrupt enable
Transmission complete interrupt enable
Receiver interrupt enable
Idle line interrupt enable
Transmitter enable
SCICR1 register description (continued)
SCICR2 register description
Parity interrupt enable
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An SCI interrupt is generated whenever TDRE = 1 in the SCISR register.
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An SCI interrupt is generated whenever TC = 1 in the SCISR register.
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An SCI interrupt is generated whenever OR = 1 or RDRF = 1 in the SCISR
register.
This bit is set and cleared by software.
0: Interrupt is inhibited
1: An SCI interrupt is generated whenever IDLE = 1 in the SCISR register.
This bit enables the transmitter. It is set and cleared by software.
0: Transmitter is disabled
1: Transmitter is enabled
Notes:
During transmission, a ‘0’ pulse on the TE bit (‘0’ followed by ‘1’) sends a preamble
(idle line) after the current word.
When TE is set there is a 1 bit-time delay before the transmission starts.
Caution: The TDO pin is free for general purpose I/O only when the TE and RE bits
are both cleared (or if TE is never set).
TCIE
RW
This bit enables the interrupt capability of the hardware parity control when a parity
error is detected (PE bit set). It is set and cleared by software.
0: Parity error interrupt disabled
1: Parity error interrupt enabled
6
RIE
RW
5
Doc ID 13829 Rev 1
ILIE
RW
4
Function
Function
RW
TE
3
RW
RE
2
Reset value: 0000 0000 (00h)
RWU
RW
1
ST72321xx-Auto
SBK
RW
0

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