LNBH24L STMicroelectronics, LNBH24L Datasheet

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LNBH24L

Manufacturer Part Number
LNBH24L
Description
Dual LNBS supply and control IC with step-up and I2C interface
Manufacturer
STMicroelectronics
Datasheet

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Features
Description
Intended for analog and digital DUAL satellite
receivers/Sat-TV, Sat-PC cards, the LNBH24L is
a monolithic voltage regulator and interface IC,
assembled in QFN 5x5 ePAD, specifically
designed to provide the 13 / 18 V power supply
and the 22 kHz tone signaling for two independent
LNB down-converters in the antenna dishes
and/or multi-switch box. In this application field, it
offers a dual tuner STBs complete solution with
extremely low component count, low power
dissipation together with simple design and I²C
standard interfacing.
Table 1.
March 2010
Complete interface between LNBS and I²C bus
Built-in DC-DC converter for single 12 V supply
operation and high efficiency (typ. 93%@0.5 A)
Selectable output current limit by external
resistor
Compliant with main satellite receivers output
voltage specification
Auxiliary modulation input (EXTM) facilitates
DiSEqC™ 1.X encoding
Low-drop post regulator and high efficiency
step-up PWM with integrated power N-MOS
allow low power losses
Overload and over-temperature internal
protections with I²C diagnostic bits
Output voltage and output current level
diagnostic feedback by I²C bits
LNB short circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins
Dual LNBS supply and control IC with step-up and I²C interface
LNBH24LQTR
Order code
Device summary
QFN32 5 x 5 (Exposed pad)
Doc ID 16857 Rev 2
Package
QFN32 5 x 5 mm (ePad)
Tape and reel
Packaging
LNBH24L
www.st.com
1/25
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Related parts for LNBH24L

LNBH24L Summary of contents

Page 1

... ESD tolerant on output power pins Description Intended for analog and digital DUAL satellite receivers/Sat-TV, Sat-PC cards, the LNBH24L is a monolithic voltage regulator and interface IC, assembled in QFN 5x5 ePAD, specifically designed to provide the power supply and the 22 kHz tone signaling for two independent LNB down-converters in the antenna dishes and/or multi-switch box ...

Page 2

... I²C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.1 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.2 Start and stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.3 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.5 Transmission without acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 LNBH24 software description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.1 Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.2 System register (SR, 1 Byte for each section A and 7.3 Transmitted data (I²C bus write mode) for each sections A 2/25 Doc ID 16857 Rev 2 LNBH24L ...

Page 3

... LNBH24L 7.4 Diagnostic received data (I²C read mode) for both sections A 7.5 Power-ON I²C interface reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.6 Address pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.7 DiSEqC™ implementation for each section A Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Doc ID 16857 Rev 2 Contents 3/25 ...

Page 4

... Linear Post-reg - - +Protections +Protections +Diagnostics +Diagnostics TTX- TTX kHz 22 kHz Oscillator Oscillator TEN- TEN- TEN- TEN Pull Down Pull Down Controller Controller LNBH24L LX- LX P-GND- P-GND Vup - Vup - - - B B VoRX- VoRX VoTX- VoTX ...

Page 5

... LNBH24L 2 Introduction The LNBH24L includes two completely independent sections. Unless for the V inputs, each circuit can be separately controlled and have its independent external components. All the below specification must be considered equal for both sections (A/B). 2.1 Application information (valid for each section A/B) This IC has a built-in DC-DC step-up converter that, from a single source from generates the voltages (V dissipated power of 0 ...

Page 6

... TTX bit must be set LOW during the stand-by condition). 2.8 Diagnostic and protection functions The LNBH24L has two diagnostic internal functions provided via I²C bus by reading 2 bits on the system register (SR bits in read mode). The diagnostic bits are, in normal operation (no 6/25 Figure 3: LNBH24L with internal tone for DiSEqC 1.X applications output with 0.5 cycles ± ...

Page 7

... Thermal protection and diagnostic The LNBH24L is also protected against overheating: when the junction temperature exceeds 150°C (typ.), the step-up converter and the liner regulator are shut-off, and the diagnostic OTF SR bit is set to "1". Normal operation is resumed and the OTF bit is reset to LOW when the junction is cooled down to 135° ...

Page 8

... Bidirectional data from / to I²C bus. Serial Clock Clock from I²C bus. These pins will accept the DiSEqC code from the main microcontroller. The LNBH24L will uses this code to modulate DiSEqC Inputs the internally generated 22 kHz carrier. Set to ground if not used. ...

Page 9

... LNBH24L Table 2. Pin description (continued) Pin n° Symbol (sec. A/ EXTM EXTM P-GND P-GND-B Epad Epad 22 A-GND 19 BYP By-pass Capacitor 8 / ADDR ADDR-B 15/ ISEL ISEL Reserved 27 Name External modulation inputs act on V External outputs to superimpose an external 22 kHz signal. Need DC Modulation decoupling to the AC source. If not used they can be left floating ...

Page 10

... Junction temperature range J Table 5. Thermal data Symbol R Thermal resistance junction-case thJC Thermal resistance junction-ambient with device soldered R thJA on 2s2p PC board 10/25 Parameter (1) Parameter Parameter Doc ID 16857 Rev 2 LNBH24L Value Unit -0 Internally limited ...

Page 11

... LNBH24L 5 Application circuits Figure 3. LNBH24L with internal tone for DiSEqC 1.X applications Vin Vin Vin Vin 12V 12V 12V 12V Tone Enable control Tone Enable control Tone Enable control ...

Page 12

... Application circuits Figure 5. LNBH24L with PDC circuit for DiSEqC 1.X applications Vin Vin Vin Vin 12V 12V 12V 12V Tone Enable control Tone Enable control Tone Enable control TTL ...

Page 13

... V 6.5 Transmission without acknowledge Avoiding to detect the acknowledges of the LNBH24L, the microprocessor can use a simpler transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. This approach of course is less protected from misworking and decreases the noise immunity ...

Page 14

... I²C bus interface Figure 6. Data validity on the I²C bus Figure 7. Timing diagram of I²C bus Figure 8. Acknowledge on the I²C bus 14/25 Doc ID 16857 Rev 2 LNBH24L ...

Page 15

... LNBH24L 7 LNBH24 software description The LNBH24L I²C interface controls both the IC sections A and B depending on the address sent before the DATA byte. All the below description is valid for both sections. 7.1 Interface protocol The interface protocol comprises: ● A start condition (S) ● A chip address byte [the LSB bit determines read (=1)/write (=0) transmission] ● ...

Page 16

... I²C bus in read mode. The read mode is master activated by sending the chip address with R/W bit set the following master generated clocks bits, LNBH24L issues a byte on the SDA data bus line (MSB transmitted first). At the ninth clock bit the master can: ● ...

Page 17

... DiSEqC™ implementation for each section A/B LNBH24L helps system designer to implement DiSEqC 1.x protocol by allowing an easy PWK modulation of the 22 kHz carrier through the EXTM and V the system to the specification is thus not implied by the bare use of the LNBH24L (see DiSEqC 1.x operation descriptions and typical application circuits). VSEL ...

Page 18

... DSQIN=HIGH or TEN=1, TTX=1, DiSEqC 1.X configuration using internal generator, I from 0 to 500 OUT mA, C from 0 to 750 nF, PDC OUT optional circuit connected to LNB (1) bus DSQIN=HIGH or TEN=1, TTX=1 (using internal generator) Doc ID 16857 Rev 2 LNBH24L = 25°C. J Min. Typ. Max. Unit ...

Page 19

... LNBH24L Table 9. Electrical characteristics of each sections A/B (continued) Symbol Parameter Tone rise or Fall time PDC pin logic LOW PDC_OL I PDC pin leakage current PDC_OZ G External modulation Gain EXTM External modulation input V EXTM voltage External modulation Z EXTM impedance Eff DC-DC converter efficiency ...

Page 20

... R/W bit determines the transmission mode: read (R/W=1) write (R/W=0) R/W bit determines the transmission mode: read (R/W=1) write (R/W=0) SECTION “B” ADDRESS SELECTION R/W bit determines the transmission mode: read (R/W=1) write (R/W=0) R/W bit determines the transmission mode: read (R/W=1) write (R/W=0) Doc ID 16857 Rev 2 LNBH24L Min. Typ. Max. Unit 0 0 ...

Page 21

... LNBH24L 9 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ® ECOPACK trademark. Doc ID 16857 Rev 2 Package mechanical data ® ...

Page 22

... Package mechanical data Table 12. QFN32 ( mm) mechanical data Dim ddd Figure 9. QFN32 package dimensions 22/25 (mm.) Min. Typ. 0.80 0.90 0 0.02 0.20 0.18 0.25 4.85 5.00 3.20 4.85 5.00 3.20 0.50 0.30 0.40 Doc ID 16857 Rev 2 LNBH24L Max. 1.00 0.05 0.30 5.15 3.70 5.15 3.70 0.50 0.08 7376875/E ...

Page 23

... LNBH24L Tape & reel QFNxx/DFNxx (5x5 mm.) mechanical data Dim. Min 12 mm. Typ. Max. Min. 330 13.2 0.504 0.795 101 3.898 14.4 5.25 5.25 1 Doc ID 16857 Rev 2 Package mechanical data inch. Typ. Max. 12.992 0.519 3.976 0.567 0.207 0.207 0.043 ...

Page 24

... Revision history 10 Revision history Table 13. Document revision history Date Revision 03-Dec-2009 1 18-Mar-2010 2 24/25 Initial release. Modified: Figure 3 on page 11 and Doc ID 16857 Rev 2 Changes Figure 5 on page 12. LNBH24L ...

Page 25

... LNBH24L Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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