LNBH25 STMicroelectronics, LNBH25 Datasheet - Page 22

• Manufacturer Part Number: LNBH25
• Description: LNB supply and control IC with step-up and I2C interface
• Manufacturer: STMicroelectronics

I²C interface protocol
Table 10.
7.4
Table 11.
22/34
(MSB)
(MSB)
(LSB)
Bit 6
Bit 7
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
BIT
BIT
THERM
VMON
COMP
Name
Name
DATA 4 (Read/Write register. Register address = 0X5) (continued)
N/A = Reserved bit.
All bits reset to 0 at power-on.
Status registers
The STATUS 1, 2 registers can be addressed only in read mode and provide the diagnostic
functions described in the following tables.
STATUS 1 (Read register. Register address = 0X0)
N/A = Reserved bit.
All bits reset to 0 at power-on.
PDO
PNG
OLF
OTF
N/A
N/A
N/A
Value
Value
1
0
1
0
1
0
1
0
1
0
-
-
-
1
0
1
0
If Thermal protection is activated (OTF=1), all VSEL 1..4 bits are reset to “0” and
LNB output (V
after the overtemperature condition is removed (OTF=0).
In case of Thermal protection activation (OTF=1) the LNB output (V
automatically enabled as soon as the overtemperature condition is removed
(OTF=0) with the previous VSEL bits setting.
DC-DC converter compensation set to use HIGH ESR capacitors (V
DC-DC converter compensation set to use LOW ESR capacitors (V
V
the overload operation settings (ISET, PCL, TIMER bits).
No overload protection has been triggered to the V
Reserved
Output voltage (V
Table 17
Output voltage (V
Reserved
Overcurrent detected on output pull-down stage for a time longer than the deglitch
period. This may happen due to an external voltage source present on the LNB
output (V
No overcurrent detected on output pull-down stage.
Reserved
Junction overtemperature is detected, T
Table 10
Junction overtemperature not detected, T
protection threshold.
Input voltage (V
Input voltage (V
OUT
pin overload protection has been triggered (I
.
.
OUT
pin).
Doc ID 022433 Rev 4
OUT
CC
CC
OUT
OUT
pin) is disabled. The VSEL bits must be set again by the master
pin) lower than LPD minimum thresholds. Refer to
pin) higher than LPD thresholds. Refer to
pin) lower than VMON specification thresholds. Refer to
pin) is within the VMON specifications.
Description
Description
J
> 150 °C. See also THERM bit setting in
J
< 135 °C. T
OUT
OUT
> I
J
pin (I
is below thermal
MAX
OUT
). Refer to
Table 13
< I
MAX
OUT
UP
UP
.
Table 13
pin)
Table 9
).
pin)
pin) is
LNBH25
.
for