DS2505 Maxim, DS2505 Datasheet - Page 11

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DS2505

Manufacturer Part Number
DS2505
Description
Manufacturer
Maxim
Datasheet

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DS2505
Note that the initial pass through the Read Status flow chart will generate a 16-bit CRC value that is the
result of clearing the CRC generator and then shifting in the command byte followed by the 2 address
bytes, and finally the data bytes beginning at the first addressed memory location and continuing through
to the last byte of the addressed EPROM Status data page. The last byte of a Status data page always has
an ending address of xx7 or xxFH. Subsequent passes through the Read Status flow chart will generate a
16-bit CRC that is the result of clearing the CRC generator and then shifting in the new data bytes,
starting at the first byte of the next page of the EPROM Status data field.
This feature is provided since the EPROM Status information may change over time, making it
impossible to program the data once and include an accompanying CRC that will always be valid.
Therefore, the Read Status command supplies a 16-bit CRC that is based on and always is consistent with
the current data stored in the EPROM Status data field. After the 16-bit CRC of the last EPROM Status
data page is read, the bus master will receive logical 1s from the DS2505 until a reset pulse is issued. The
Read Status command sequence can be ended at any point by issuing a reset pulse.
EXTENDED READ MEMORY [A5H]
The Extended Read Memory command supports page redirection when reading data from the 16384-bit
EPROM data field. One major difference between the Extended Read Memory and the basic Read
Memory command is that the bus master receives the Redirection Byte first before investing time in
reading data from the addressed memory location. This allows the bus master to quickly decide whether
to continue and access the data at the selected starting page or to terminate and restart the reading process
at the redirected page address. A non-redirected page is identified by a Redirection Byte with a value of
FFH (see description of EPROM Status Bytes). If the Redirection Byte is different than this, the master
has to complement it to obtain the new page number. Multiplying the page number by 32 (20H) results in
the new address the master has to send to the DS2505 to read the updated data replacing the old data.
There is no logical limitation in the number of redirections of any page. The only limit is the number of
available memory pages within the DS2505.
In addition to page redirection, the Extended Read Memory command also supports “bit-oriented”
applications where the user cannot store a 16-bit CRC with the data itself. With bit-oriented applications
the EPROM information may change over time within a page boundary, making it impossible to include
an accompanying CRC that will always be valid. Therefore, the Extended Read Memory command
concludes each page with the DS2505 generating and supplying a 16-bit CRC that is based on and
therefore always consistent with the current data stored in each page of the 16384-bit EPROM data field.
After having sent the command code of the Extended Read Memory command, the bus master follows
the command byte with a 2-byte address (TA1=(T7:T0), TA2=(T15:T8)) that indicates a starting byte
location within the data field. By sending eight read data time slots, the master receives the Redirection
Byte associated with the page given by the starting address. With the next 16 read data time slots, the bus
master receives a 16-bit CRC of the command byte, address bytes and the Redirection Byte. This CRC is
computed by the DS2505 and read back by the bus master to check if the command word, starting address
and Redirection Byte were received correctly.
If the CRC read by the bus master is incorrect, a reset pulse must be issued and the entire sequence must
be repeated. If the CRC received by the bus master is correct, the bus master issues read time slots and
receives data from the DS2505 starting at the initial address and continuing until the end of a 32-byte
page is reached. At that point the bus master will send 16 additional read time slots and receive a 16-bit
CRC that is the result of shifting into the CRC generator all of the data bytes from the initial starting byte
to the last byte of the current page.
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