DS28E04-100 Maxim, DS28E04-100 Datasheet - Page 3

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DS28E04-100

Manufacturer Part Number
DS28E04-100
Description
The DS28E04-100 is a 4096-bit, 1-Wire® EEPROM chip with seven address inputs
Manufacturer
Maxim
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
DS28E04-100
Manufacturer:
DALLAS
Quantity:
20 000
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
Note 18:
Time Slot Duration
(Note 1)
IO PIN, 1-Wire RESET, PRESENCE DETECT CYCLE
Reset Low Time (Note 1)
Presence-Detect High
Time
Presence-Detect Fall Time
(Notes 3, 18)
Presence-Detect Low
Time
Presence-Detect Sample
Time (Note 1)
IO PIN, 1-Wire WRITE
Write-0 Low Time
(Notes 1, 19)
Write-1 Low Time
(Notes 1, 19)
IO PIN, 1-Wire READ
Read Low Time
(Notes 1, 20)
Read Sample Time
(Notes 1, 20)
EEPROM
Programming Current
Programming Time
Write/Erase Cycles
(Endurance) (Note 23)
Data Retention
(Notes 23, 24)
PARAMETER
System requirement.
Maximum instantaneous pulldown current through all pins combined.
Guaranteed by design, simulation only. Not production tested.
This load current is caused by the internal weak pullup, which asserts a logical 1 to address pins that are not connected. The
logical state of the address pins must not change during the execution of ROM function commands during those time slots in
which these bits are relevant.
The I-V characteristic is linear for voltages less than 1V.
Width of the narrowest pulse that trips the activity latch. Back to back pulses that are active for < t
intermediate inactive time < t
The Pulse function requires that V
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The
specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily
loaded systems, an active pullup such as that found in the DS2482-x00, DS2480B, or DS2490 may be required.
Capacitance on the data pin could be 800pF when V
after V
V
recovery times. The V
Voltage below which, during a falling edge on IO, a logic 0 is detected.
The voltage on IO needs to be less than or equal to V
Voltage above which, during a rising edge on IO, a logic 1 is detected.
After V
Applies to a single DS28E04-100 without V
The earliest recognition of a negative edge is possible at t
Highlighted numbers are NOT in compliance with legacy 1-Wire product standards. See comparison table.
Interval during the negative edge on IO at the beginning of a Presence Detect pulse between the time at which the voltage is
80% of V
TL
, V
TH
PUP
TH
, and V
PUP
is crossed during a rising edge on IO, the voltage on IO has to drop by at least V
has been applied the parasite capacitance will not affect normal communications.
and the time at which the voltage is 20% of V
HY
are a function of the internal supply voltage, which in parasite power mode, is a function of V
TH
SYMBOL
and V
I
t
t
t
t
t
t
t
t
PROG
PROG
N
t
t
SLOT
RSTL
MSR
t
PDH
FPD
MSP
W0L
W1L
t
PDL
DR
RL
CY
PWMIN
TL
maximum specifications are valid at V
CC
(max) are not guaranteed to be filtered.
power is available; otherwise the command will not be executed.
Standard speed
Overdrive speed
Standard speed, V
Standard speed (Note 17)
Overdrive speed, V
Overdrive speed (Note 17)
Standard speed
Overdrive speed (Note 17)
Standard speed, V
Standard speed
Overdrive speed
Standard speed
Overdrive speed, V
Overdrive speed (Note 17)
Standard speed, V
Standard speed
Overdrive speed
Standard speed
Overdrive speed (Note 17)
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
(Note 21)
(Note 22)
At +25°C
At +85°C (worst case)
At +85°C (worst case)
CC
supply, attached to a 1-Wire line.
CONDITIONS
PUP
ILMAX
3 of 37
is first applied. If a 2.2kΩ resistor is used to pull up the data line, 2.5µs
REH
PUP
whenever the master drives the line low.
PUP
PUP
PUP
PUP
PUP
.
after V
> 4.5V
> 4.5V
> 4.5V
> 4.5V
> 4.5V
TH
CC
has been previously reached.
= V
PUP
= 5.25V. In any case, V
t
t
RL
RL
200k
1.10
MIN
480
504
50k
1.1
8.1
65
48
53
15
60
64
67
60
40
9
2
0
8
8
7
5
1
5
1
+ δ
+ δ
HY
to be detected as logic '0'.
PWMIN
TYP
(max) and that have an
TL
< V
15 - δ
TH
MAX
3.75
2 - δ
640
640
240
120
PUP
7.0
1.1
80
80
60
24
26
75
75
10
16
15
15
10
7
2
2
1
< V
and the 1-Wire
PUP
.
UNITS
years
mA
ms
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs

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