DS1372 Maxim, DS1372 Datasheet - Page 11

• Manufacturer Part Number: DS1372
• Description: The DS1372 is a 32-bit binary up counter and 24-bit down counter with a unique 64-bit ID
• Manufacturer: Maxim

2) Slave transmitter mode (DS1372 read mode): The
Figure 6. Data Write—Slave Receiver Mode
Figure 7. Data Read (from Current Pointer Location)—Slave Transmitter Mode
Figure 8. Data Read (Write Pointer, Then Read)—Slave Receive and Transmit
I
first byte is received and handled as in the slave
receiver mode. However, in this mode, the direction
bit indicates that the transfer direction is reversed.
The DS1372 transmits serial data on SDA while the
serial clock is input on SCL. START and STOP con-
ditions are recognized as the beginning and end of
a serial transfer (see Figure 7). The slave address
byte is the first byte received after the master gener-
ates the START condition. The slave address byte
contains the 7-bit DS1372 address, which is 110100
and AD0. Each slave address is followed by the
2
C, 32-Bit, Binary Counter Clock with 64-Bit ID
S - START
A - ACKNOWLEDGE (ACK)
P - STOP
A - NOT ACKNOWLEDGE (NACK)
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
S - START
A - ACKNOWLEDGE (ACK)
P - STOP
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
S
S
<SLAVE ADDRESS> <R/W>
<SLAVE ADDRESS> <R/W>
110100
110100
S - START
Sr - REPEATED START
A - ACKNOWLEDGE (ACK)
P - STOP
A - NOT ACKNOWLEDGE (NACK)
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
______________________________________________________________________________________
S
<SLAVE ADDRESS>
AD0
XXXXXXXX
AD0
<DATA (n)>
110100A
0
1
AD0
A
A
<WORD ADDRESS (n)>
<R/W>
A
MASTER TO SLAVE
0
<DATA (n)>
XXXXXXXX
XXXXXXXX
SLAVE TO MASTER
A
<DATA (n + 1)>
XXXXXXXX
<WORD ADDRESS (n)>
MASTER TO SLAVE
XXXXXXXX
A
A
A
<DATA (n + 1)>
SLAVE TO MASTER
<DATA (n)>
XXXXXXXX
XXXXXXXX
A
<DATA (n + 2)>
MASTER TO SLAVE
XXXXXXXX
<SLAVE ADDRESS (n)>
Sr
SLAVE TO MASTER
110100A
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK.
direction bit (R/W), which is one for a read. The bit
position signified by A is compared to the value on
the AD0 pin. After receiving and decoding the slave
address byte, the device outputs an acknowledge
on the SDA line. The DS1372 then begins to transmit
data starting with the register address pointed to by
the register pointer. If the register pointer is not writ-
ten to before the initiation of a read mode, the first
address that is read is the last one stored in the reg-
ister pointer. The DS1372 must receive a "not
acknowledge" to end a read.
A
A
(X + 1 BYTES + ACKNOWLEDGE)
A
(X + 1 BYTES + ACKNOWLEDGE)
AD0
<DATA (n + 1)>
<DATA (n + 2)>
XXXXXXXX
XXXXXXXX
...
DATA TRANSFERRED
DATA TRANSFERRED
<R/W>
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK.
1
<DATA (n + X)>
XXXXXXXX
A
(X + 1 BYTES + ACKNOWLEDGE)
A
A
DATA TRANSFERRED
...
...
A
<DATA (n + X)>
<DATA (n + X)
XXXXXXXX
XXXXXXXX
P
A
A
P
P
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