71M6511 Maxim, 71M6511 Datasheet
71M6511
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71M6511 Summary of contents
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... A Maxim Integrated Products Brand GENERAL DESCRIPTION The 71M6511 is a highly integrated SOC with an MPU core, RTC, flash, and LCD driver. Our Single Converter Technology® with a 22-bit delta- sigma ADC, three analog inputs, digital temperature compensation, precision voltage reference, and 32-bit computation engine (CE) supports a wide range of single-phase metering applications with very few low cost external components ...
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... Real-Time Monitor ...................................................................................................................... 13 CE Functional Overview ............................................................................................................. 13 80515 MPU Core ..................................................................................................................................... 15 80515 Overview ......................................................................................................................... 15 Memory Organization ................................................................................................................. 15 Special Function Registers (SFRs) .............................................................................................. 17 Special Function Registers (Generic 80515 SFRs) ...................................................................... 18 Special Function Registers Specific to the 71M6511 .................................................................... 20 Instruction Set ............................................................................................................................ 21 UART ......................................................................................................................................... 21 Timers and Counters .................................................................................................................. 24 WD Timer (Software Watchdog Timer) ........................................................................................ 26 Interrupts .................................................................................................................................... 29 External Interrupts ...................................................................................................................... 32 Interrupt Priority Level Structure ...
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... VARh Accuracy at Room Temperature ..................................................................................................... 75 Harmonic Performance ............................................................................................................................. 76 Meter Accuracy over Temperature (71M6511H) ........................................................................................ 76 APPLICATION INFORMATION .............................................................................................................................. 77 Connection of Sensors (CT, Resistive Shunt, Rogowski Coil) .................................................................... 77 Distinction between 71M6511 and 71M6511H Parts .................................................................................. 77 Temperature Compensation and Mains Frequency Stabilization for the RTC.............................................. 78 External Temperature Compensation ........................................................................................................ 79 Temperature Measurement ...................................................................................................................... 79 Connecting LCDs ..................................................................................................................................... 80 Connecting I2C EEPROMs ...
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... Figure 34: LCD Boost Circuit...................................................................................................................................... 81 Figure 35: EEPROM Connection ................................................................................................................................. 82 Figure 36: Interfacing 0-5V Signal .................................................................................................................. 82 Figure 37: Connection for Optical Components ........................................................................................................... 83 Figure 38: Voltage Divider for V1 ............................................................................................................................... 83 Figure 39: External Components for RESETZ .............................................................................................................. 84 Page Single-Phase Energy Meter IC © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Table 43: The IRCON Bit Functions............................................................................................................................. 32 Table 44: External MPU Interrupts ............................................................................................................................. 33 Table 45: Control Bits for External Interrupts .............................................................................................................. 33 Table 46: Priority Level Groups .................................................................................................................................. 34 Table 47: The IP0 Register:........................................................................................................................................ 34 Table 48: The IP1 Register:........................................................................................................................................ 34 Page Single-Phase Energy Meter IC © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Table 56: Liquid Crystal Display Segment Table (Typical) ............................................................................................ 41 Table 57: EECTRL Status Bits ................................................................................................................................... 44 Table 58: TMUX[3:0] Selections ............................................................................................................................... 45 Table 59: SSI Pin Assignment .................................................................................................................................... 46 Table 60: Power Saving Measures ............................................................................................................................. 52 Table 61: CHOP_EN Bits .......................................................................................................................................... 53 Table 62: Frequency over Temperature ....................................................................................................................... 78 Page Single-Phase Energy Meter IC © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... DATA 0000-FFFF MPU (8051) 0000-07FF PROG 0000-FFFF 0000-FFFF EMULATOR V3P3 PORT FAULTZ RESETZ Figure 1: IC Functional Block Diagram © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V3P3A GNDA GNDA VOLTAGE BOOST VDRV FIR LCD_IBST LCD_BSTEN FILTER GNDD VOLT ...
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... A block diagram of the chip is shown in Figure 1. A detailed description of various hardware blocks follows. Analog Front End (AFE) The AFE of the TERIDIAN 71M6511 Power Meter IC is comprised of an input multiplexer, a delta-sigma A/D converter with a voltage reference, followed by an FIR filter. A block diagram of the AFE is shown in Figure 3. ...
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... Voltage Reference The 71M6511/6511H includes an on-chip precision bandgap voltage reference that incorporates auto-zero techniques. The reference of the 71M6511H is trimmed in production to minimize errors caused by component mismatch and drift. The result is a voltage output with a predictable temperature coefficient. The voltage reference is chopper stabilized, i.e. the polarity can be switched by the MPU using the I/O RAM register CHOP_ENA (0x2002[5:4]). The two bits in the CHOP_ENA register enable the MPU to operate the chopper circuit in regular or inverted operation “ ...
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... The Functional Description Section contains a chapter with a detailed description on controlling the CHOP_ENA register. Temperature Sensor The 71M6511/6511H includes an on-chip temperature sensor implemented as a bandgap reference used to determine the die temperature The MPU may request an alternate multiplexer cycle containing the temperature sensor output by asserting MUX_ALT ...
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... MPU data to/from 32-bit wide CE DRAM data, and wait states are inserted as needed, depending on the frequency of CKMPU. Table 3 shows the CE DRAM addresses allocated to analog inputs from the AFE. Page Single-Phase Energy Meter IC Figure 3: AFE Block Diagram © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... EQU specifies the equation to be used based on the number and arrangement of phases used for metering. In case of single-phase metering, the unconnected input should be tied to V3P3A, the analog supply voltage. The EQU selection enables the 71M6511 to calculate single-phase power measurement based on the type of service used. Table 4 also states the sequence of the multiplexer in the AFE. ...
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... Figure 4: Samples in Multiplexer Cycle 833ms 833ms Figure 5: Accumulation Interval © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 1/32768Hz = 1/32768Hz = 30.518µs 30.518µs XFER_BUSY XFER_BUSY Interrupt to MPU Interrupt to MPU V2 ...
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... Page Single-Phase Energy Meter IC is the sampling delay between voltage and current. delay © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 ® , however, exploits the 32-bit signal V2.7 ...
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... XRAM, CE DRAM, CE PRAM and I/O RAM, and internal data memory (Internal RAM). Figure 6 shows the memory map (see also Table 55). Internal and External Data Memory: Both internal and external data memory are physically located on the 71M6511 IC. Ex- ternal data memory is only external to the 80515 MPU core. ...
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... Table 5: Stretch Memory Cycle Width © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Write signal width memaddr memwr ...
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... S0RELL DIR0 IEN2 S1CON S1BUF DPS ERASE TL0 TL1 TH0 DPL DPH DPL1 Table 7: Special Function Registers Locations © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 RAM Bin/He X101 X110 X111 USR2 PGADR S1RELL EEDATA EECTRL TH1 CKCON ...
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... User 2 Port, high address byte for MOVX@Ri Interrupt Request Control Register Program Status Word Baud Rate Control Register (only WDCON.7 bit used) Accumulator B Register Table 8: Special Function Registers Reset Values © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Table 9: PSW Register Flags Bank selected RS1/RS0 00 Bank 0 01 Bank 1 10 Bank 2 11 Bank 3 Table 10: PSW bit functions © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 LSB - P Location (0x00 – 0x07) (0x08 – 0x0F) (0x10 – 0x17) (0x18 – 0x1F) V2.7 ...
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... MPU can output or read data through any of these ports. Even if a DIO pin is configured as an output, the state of the pin can still be read by the MPU, for example when counting pulses issued via DIO pins that are under CE control. Special Function Registers Specific to the 71M6511 Table 12 shows the location and description of the 71M6511-specific SFRs. Register Alternative ...
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... Software User’s Guide (SUG). UART The 71M6511 includes a UART (UART0) that can be programmed to communicate with a variety of AMR modules. A second UART (UART1) is connected to the optical port, as described in the optical port description. The UART is a dedicated 2-wire serial interface, which can communicate with an external host processor 38,400 bits/s ((with MPU clock = 1 ...
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... Start bit, 8 data bits, stop bit, variable baud rate (internal baud rate generator) Table 14: UART Modes SM20 REN0 TB80 RB80 Table 15: The S0CON Register © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 /( -S0REL)) CKMPU 10 f ...
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... UART 1 3 9-bit UART 1 transmitted data bit in Modes 2 and 3. Set or cleared by the th data bit received. In Mode 1, if SM20 is 0, Table 17: The S0CON Bit Functions © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 LSB TI1 RI1 SM1 ...
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... Mode A. Set or cleared by the MPU, th data bit received. In Mode B, if SM21 is 0, Table 18: The S1CON Bit Functions M1 M0 GATE C/T Table 19: The TMOD Register © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Baud Rate variable variable LSB M1 M0 Timer 0 ...
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... Timer/Counter Control Register (TCON) MSB TF1 TR1 Page Single-Phase Energy Meter IC Table 20: TMOD Register Bit Description Function Table 21: Timers/Counters Mode Description TF0 TR0 IE1 IT1 Table 22: The TCON Register © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 LSB IE0 IT0 V2.7 ...
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... WDTS is cleared either by the reset signal or by changing the state of the WDT timer. Page Single-Phase Energy Meter IC Table 23: The TCON Register Bit Functions Timer 1 Mode 1 Mode 2 YES YES YES YES Not allowed YES Table 24: Timer Modes Table 25: The PCON Register © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 LSB V2.7 ...
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... Note: The remaining bits in the IEN1 register are not used for watchdog control Page Single-Phase Energy Meter IC ET2 ES0 ET1 EX1 Table 26: The IEN0 Register (see also Table 34) EX6 EX5 EX4 EX3 © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 LSB ET0 EX0 LSB EX2 V2.7 ...
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... Page Single-Phase Energy Meter IC IP0.5 IP0.4 IP0.3 IP0.2 Table 30: The IP0 Register (see also Table 46 Table 32: The WDTREL Register Table 33: The WDTREL Bit Functions © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 LSB IP0.1 IP0.0 LSB 1 0 V2.7 ...
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... SFRs IEN0, IEN1, and IEN2. External interrupts are the interrupts external to the 80515 core, i.e. signals that originate in other parts of the 71M6511/6511H, for example the CE, DIO, RTC EEPROM interface, comparators. Interrupt Overview: When an interrupt occurs, the MPU will vector to the predetermined address as shown in Table 51. Once interrupt service has begun, it can be interrupted only by a higher priority interrupt. The interrupt service is terminated by a return from instruction, " ...
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... ET1=0 – disable timer 1 overflow interrupt EX1=0 – disable external interrupt 1 ET0=0 – disable timer 0 overflow interrupt EX0=0 – disable external interrupt 0 Page Single-Phase Energy Meter IC Table 35: The IEN0 Bit Functions © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... EX4=0 – disable external interrupt 4 EX3=0 – disable external interrupt 3 EX2=0 – disable external interrupt 2 Table 37: The IEN1 Bit Functions - - - Table 38: The IEN2 Register Table 39: The IEN2 Bit Functions © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 LSB EX3 EX2 LSB - - ES1 ...
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... TR0 IE1 Table 40: The TCON Register Table 41: The TCON Bit Functions EX6 IEX5 IEX4 Table 42: The IRCON Register Table 43: The IRCON Bit Functions © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 LSB IT1 IE0 IT0 LSB IEX3 IEX2 ...
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... Table 44: External MPU Interrupts Flag Bit IE0 IE1 IEX2 IEX3 IEX4 IEX5 IEX6 IE_XFER IE_RTC Table 45: Control Bits for External Interrupts © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Flag Reset automatic automatic falling automatic falling automatic rising automatic falling ...
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... Level0 (lowest Level1 1 0 Level2 1 1 Level3 (highest) Table 49: Priority Levels © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 External interrupt 2 External interrupt 3 External interrupt 4 External interrupt 5 External interrupt 6 LSB IP0.2 IP0.1 IP0.0 LSB IP1.2 IP1.1 IP1 ...
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... External interrupt 1 Timer 1 interrupt Serial channel 0 interrupt Serial channel 1 interrupt External interrupt 2 External interrupt 3 External interrupt 4 External interrupt 5 External interrupt 6 Table 51: Interrupt Vectors © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 0x0003 0x000B 0x0013 0x001B 0x0023 0x0083 0x004B 0x0053 ...
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... IRCON IRCON.2 IRCON.3 > IRCON.4 IRCON.5 Figure 7: Interrupt Structure © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Priority Enable IEN0.7 IEN0.0 IP1.0/ IP0.0 IEN2.0 IEN0 ...
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... On-Chip Resources DIO Ports The 71M6511/6511H includes pins of general purpose digital I/O. These pins are dual function and can alternatively be used as LCD drivers. Figure 8 shows a block diagram of the DIO section. On reset or power-up, all DIO pins are inputs until they are configured for the desired direction. The pins are configured and controlled by the DIO and DIO_DIR registers (SFRs) and by the five bits of the I/O register LCD_NUM (0x2020[4:0]) ...
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... Static RAM Flash Memory: The 71M6511 includes 64KB of on-chip flash memory. The flash memory is intended to primarily contain MPU program code typical application, it also contains images of the CE program code, CE coefficients, MPU RAM, and I/O RAM. On power-up, before enabling the CE, the MPU must copy these images to their respective memory locations. ...
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... MPU RAM: The 71M6511 includes 2KB of static RAM memory on-chip (XRAM), which are backed-up by the battery plus 256- bytes of internal RAM in the MPU core. The 2KB of static RAM are used for data storage during normal MPU operations. ...
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... RTC time as necessary as discussed in temperature compensation. LCD Drivers The 71M6511 contains 15 dedicated LCD segment pins, 5 LCD segment pins that rare shared with the SSI port and/or other functions, and an additional 12 multi-purpose pins (LCD/DIO) that may be configured as LCD segment drivers (see I/O RAM register LCD_NUM) ...
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... Applications section for details). UART (UART0) and Optical Port (UART1) The 71M6511/6511H includes an interface to implement optical port. The pin OPT_TX is designed to directly drive an external LED for transmitting data on an optical link (low-active). The pin OPT_RX, also low-active, is designed to sense the input from an external photo detector used as the receiver for the optical link ...
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... In addition to the basic software watchdog timer included in the 80515 MPU, an independent, robust, fixed-duration, hardware watchdog timer (WDT) is included in the 71M6511/6511H. This timer will reset the MPU not refreshed periodically, and can be used to recover the MPU in situations where program control is lost. ...
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... Single-Phase Energy Meter IC V1 V3P3 WDT dis- V3P3-10mV abled V3P3 - 400mV Normal operation, WDT enabled when (V1 < VBIAS) VBIAS the battery is enabled Battery or reset mode 0V Figure 11: Voltage Range for interface. © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Internal Voltages (VBIAS, VBAT, V2P5) The 71M6511 requires two supply voltages, V3P3A, for the analog section, and V3P3D, for the digital section. Both voltages can be tied together outside the chip. The internal supply voltage V2P5 is generated by a regulator from the 3.3V supplies. ...
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... WDTR_EN (Comparator 1 Output AND V1LT3) digital reserved digital reserved digital RXD (from Optical interface) digital MUX_SYNC digital CK_10M digital CK_MPU -- reserved for production test digital RTCLK digital CE_BUSY digital XFER_BUSY Table 58: TMUX[3:0] Selections © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... SCLK after MUX_SYNC (fourth SCLK if 10MHz). MUX_SYNC can be used to synchronize the fields arriving at the data logger or DSP. Page Single-Phase Energy Meter IC SCLK SEG3 SSDATA SEG4 SFR SEG5 SRDY SEG6 Table 59: SSI Pin Assignment © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Thus, simple RMS measurements are inherently inaccurate. A modern solid-state electricity meter IC such as the 71M6511/6511H functions by emulating the integral operation above, i.e. it processes current and voltage samples through an ADC at a constant frequency. As long as the ADC resolution is high enough and the sample frequency is beyond the harmonic range of interest, the current and voltage samples, multiplied with the time period of sampling will yield an accurate quantity for the momentary energy ...
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... ADC MUX Frame Conversions (MUX_DIV=4 is shown) MUX_DIV 1 ADC0 ADC1 450 900 CK COUNT = CE_CYCLES + floor((CE_CYCLES + INITIATED OPCODE AT END OF SUM INTERVAL © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 2 3 ADC2 ADC3 1350 MAX CK COUNT BEGIN SSI TRANSFER Settle ...
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... FLAG Figure 14: RTM Output Format If 16bit fields SSI_BEG Next field is delayed while SRDY is low © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 FLAG If 32bit fields If SSI_CKGATE = ...
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... Pre- Post- Processor Processor I/O RAM (Configuration RAM) Figure 17: MPU/CE Data Flow ⋅ 2520 = = = ACC 32768 Hz f 2520 . © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Processed Metering Data , the product of SUM_CYCLES and ACC = 999 . 75 ms V2.7 ...
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... W (DIO6) APULSEW APULSER EXT_PULSE DATA SAMPLES CE_BUSY CE XFER_BUSY INTERRUPTS Figure 18: MPU/CE Communication (Functional) FLASH CE_EN XFER Interrupt © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 DISPLAY (me- mory-mapped LCD segments) SERIAL (UART0/1) MPU EEPROM (I2C) DIO CE PRAM COMPUTATION ENGINE CE DRAM V2 ...
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... A Maxim Integrated Products Brand Power-Up: After power-up, the 71M6511/6511H is in reset as long as V1 < VBIAS. As soon as V1 exceeds VBIAS, the reset timer is started which takes the MPU out of reset after 4100 oscillator cycles (see Figure 20). The MPU then initiates its pre- boot phase lasting 32 cycles. The supply current will be low but not zero during power-up. It will increase, once V1 exceeds VBIAS and will increase to the nominal value once the preboot phase starts ...
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... For the 71M6511, the temperature coefficients TC1 and TC2 are given as constants that represent typical component behavior. For the 71M6511H, the temperature characteristics of the chip are measured during production and then stored in the fuse registers TRIMBGA, TRIMBGB and TRIMM[2:0]. TC1 and TC2 can be derived from the fuses by using the relations given in the Electrical Specifications section ...
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... Figure 21: Chop Polarity w/ Automatic Chopping Accumulation Interval m+1 MUX alt. MUX cycle n cycle Re- Re- Positive Positive versed versed © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Accumulation Interval m+2 MUX MUX cycle n cycle 1 Re- Re- Positive Positive versed versed Accumulation Interval m+2 alt ...
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... VMAX IMAX 47 . 1132 = Kh ⋅ ⋅ ⋅ WRATE N X ACC © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Accumulation Interval m+2 alt. MUX MUX MUX cycle n cycle 2 cycle 3 cycle re- re- Positive Positive versed 01 11 (11) (11) (11) [ ...
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... Additionally, by setting the I/O RAM register ECK_DIS to 1, the emulator clock is disabled, inhibiting access to the program with the emulator. See the cautionary note in the I/O RAM Register description! Page Single-Phase Energy Meter IC © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Digital I/O: OPT_TXDIS DIO_EEX DIO_PW RESERVED RESERVED DIO_R5[2:0] DIO_R7[2:0] DIO_R9[2:0] DIO_R11[2:0] Real Time Clock: LCD Display Interface: LCD_EN LCD_MODE[2:0] © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Bit 2 Bit 1 Bit 0 TMUX[3:0] WD_OVF EX_RTC EX_XFR RESERVED COMP_STAT[0] MPU_DIV MUX_ALT FLASH66Z ...
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... Digital I/O: DIO_DIR0[7:4] RESERVED 1111 Interrupts and WD Timer: INT5 INT4 INT3 Flash: FLSH_ERASE[7:0] FLSH_PGADR[6:0] Serial EEPROM: EEDATA[7:0] EECTRL[7:0] © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 RESERVED RESERVED RESERVED RESERVED SSI_FPOL SSI_RDYEN SSI_RDYPOL Bit 2 Bit 1 Bit 0 RESERVED 1111 DIO_1[3:0] (Port 1) ...
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... Ignored if the pin is not configured as I/O. See DIO_PV and DIO_PW for special option for DIO6 and DIO7 outputs. See DIO_EEX for special option for DIO4 and DIO5. Note: Bit 0, Bit 1, Bit 2 and Bit 3 must be set to 1. © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 Multiple -- ...
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... EX6 in the 80515 must also be set. R/W The length of the ADC decimation FIR filter ADC bits/3 CK32 cycles (384 CKFIR cycles ADC bits/2 CK32 cycles (288 CKFIR cycles) R/W Should be set minimize supply current. © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Enables the LCD display. When disabled, VLC2, VLC1, and VLC0 are ground as are the COM and SEG outputs. R/W Controls the LCD full scale voltage, VLC2: = ⋅ + VLC 2 VLCD © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 10 11 LCD _ FS ...
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... R/ The number of states in the input multiplexer states states R/ MUX_SYNC enable. When high, converts SEG7 into a MUX_SYNC © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 SEG DIO DIO4-11, DIO14-17 DIO4-11, DIO14-16 DIO4-11, DIO14-15 DIO4-11, DIO14 ...
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... R/W SSI frame pulse format: 0: once at beginning of SSI sequence (whole block of data), 1: every 8 bits, 2: every 16 bits, 3: every 32 bits. R/W SFR pulse polarity: 0: positive, 1: negative © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... It is powered by the VBAT pin and at boot-up will indicate if the part is recovering from a WD overflow or a power fault. This bit should be cleared by the MPU on boot-up also automatically cleared when RESETZ is low. © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... The parameters EQU, CE_EN, PRE_SAMPS, and SUM_CYCLES are essential to the function of the CE and are stored in I/O RAM (see I/O RAM section). Page Single-Phase Energy Meter (peak). , where SAG_THR is the LSB value in the description of SAG_THR. LSB LSB © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 . S V2.7 ...
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... ADC conversion and the number of conversions per cycle must be 12 (allowing for one settling cycle). Alternatively, the 71M6511 can be operated at ten CK32 cycles per ADC mux cycle (MUX_DIV = 2). CE quantities are stated in this section for MUX_DIV = 2, if they differ from those associated with the default setting. ...
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... Will not return to zero until VA rises above SAG_THR. 24-0 Not Used These unused bits will always be zero. Page Single-Phase Energy Meter IC Description 00 IA Phase A current 01 VA Phase A voltage 02 IB Phase B current 03 - Reserved 04 - Reserved 05 - Reserved 06 TEMP Temperature 07 -- Reserved © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... The sum of VAR samples from each wattmeter element (In_8 is the gain configured by IA_SHUNT or IB_SHUNT). -13 LSB = 6.6952*10 VMAX IMAX / In_8 Wh (for MUX_DIV = 1) -13 LSB = 5.1501*10 VMAX IMAX / In_8 Wh (for MUX_DIV = 2) © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 2 − ⋅ 9 3243 10 ...
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... RESERVED LSB= 6.6952*10 VMAX -13 LSB = 5.1501*10 VMAX RESERVED ⋅ ⋅ F VxSQSUM = S Vx RMS N © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 − ⋅ for MUX_DIV = 1 − for MUX_DIV = In_8 A h (for MUX_DIV = ...
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... Temperature Measurement and Temperature Compensation Input variables: TEMP_NOM is the reference value for temperature measurement, i.e. when this value is set with TEMP_RAW_X at known temperature. The 71M6511/6511H measures temperature with reference to this value. DEGSCALE is the slope or rate of temperature increase or decrease from the TEMP_NOM for TEMP_X measurement. ...
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... Filtered, unscaled reading from temperature sensor. This value should be written to TEMP_NOM during meter calibration. Scales all voltage and current inputs. 16384 provides unity gain. Default is 16384. If EXT_TMP = 0, GAIN_ADJ GAIN_ADJ is updated by the CE. ⋅ © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 0 C. V2.7 ...
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... APULSER * WRATE * 2 S This input is buffered and can be updated by the MPU during a computation in- terval. The change will take effect at the beginning of the next interval. © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 PULSE_SLOW PULSE_FAST - ...
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... F 0 © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 14 = 16384. The gain of each channel is directly 15 – desired to delay the current by the Φ Φ − π cos ...
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... Scale factor for the VAR calculation. The default value of need to be changed. MUX_DIV 6448 for = 1 MUX_DIV for = 2 © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 -10 W for phase A, and -10 W for phase B -10 W for phase A, and -10 W for phase B ...
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... A Maxim Integrated Products Brand TYPICAL PERFORMANCE DATA Wh Accuracy at Room Temperature VARh Accuracy at Room Temperature Figure 25: VARh Accuracy for 0.3A to 200A/240V Performance Page Single-Phase Energy Meter IC Figure 24: Wh Accuracy, 0.3A - 200A/240V © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Test performed at current distortion amplitude of 40% and voltage distortion amplitude of 10% as per IEC 62053, part 22. Figure 26: Meter Accuracy over Harmonics at 240V, 30A Page Single-Phase Energy Meter IC 60Hz Harmonic Data Harmonic © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... The first process applied to the 71M6511H is the trimming of the reference voltage, which is guaranteed to have accuracy over temperature of better that ±10PPM/°C. The second process applied to the 71M6511H is the characterization of the reference voltage over temperature. The coefficients for the reference voltage are stored in so-called trim fuses (I/O RAM registers TRIMBGA, TRIMBGB, TRIMM[2:0] ...
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... It is not recommended to measure crystal frequency directly due to the error introduced by the measurement probes. A practical method to measure the crystal frequency (when installed on the PCB with the 71M6511 have a DIO pin toggle every second, based on the RTC interrupt, with all other interrupts disabled. When this signal is measured with a precision timer, the crystal frequency can be obtained from the measured time period t (in µ ...
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... RTC. External Temperature Compensation In a production electricity meter, the 71M6511 or 71M6511H is not the only component contributing to temperature de- pendency. In fact, a whole range of components (e.g. current transformers, resistor dividers, power sources, filter capacitors) will exhibit slight or pronounced temperature effects ...
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... VLCD pin of the 71M6511. The LCD drivers are enabled with the I/O register LCD_ON; I/O register LCD_FS is used to adjust contrast, and LCD_MODE selects the operation mode (LCD type). ...
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... LCD_MODE Page Single-Phase Energy Meter IC V3P3 V3P3 71M6511 71M6511 VDRV VDRV VLCD VLCD LCD_FS LCD_FS LCD_EN LCD_EN Figure 32: LCD Boost Circuit © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 5VDC 5VDC 5V LCD 5V LCD segments segments commons commons V2.7 ...
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... DIO pins DIO4 and DIO5 to I2C pins SCL and SDA. Connecting 5V Devices In general, all pins of the 71M6511 are compatible with external 5V devices. The exceptions are the power supply pins and the RX pin of the UART (see section Electrical Specifications). ...
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... For proper debugging or loading code into the 71M6511 mounted on a PCB necessary to have a provision like the header shown above R1 in Figure 36. A shorting jumper on this header pulls V3P3, disabling the hardware watchdog timer. C1 helps suppressing ESD. ...
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... All application-specific MPU functions mentioned above under “Application Information” are available from TERIDIAN as a standard ANSI C library and as ANSI “C” source code. The code is available as part of the Demonstration Kit for the 71M6511 and 71M6511H ICs. The Demonstration Kits come with the 71M6511 or 71M6511H IC preprogrammed with demo firmware mounted on a functional sample meter PCB (Demo Board) ...
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... Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GNDA. Page Single-Phase Energy Meter IC © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 −0. 0.5V -0 ...
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... Single-Phase Energy Meter IC CONDITION Normal Operation Battery Backup No Battery Battery Backup CONDITION I = 1mA LOAD I = 15mA LOAD I = 1mA LOAD I = 15mA LOAD VIN=0V VIN=V3P3D © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 MIN TYP MAX UNIT 3.0 3.3 3 3.45 V 2.9 5.5 V Externally Connect to V3P3D 2.0 3.8 V -40 85 º ...
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... Normal Operation as above, except write flash at maximum rate. ≤25°C Battery backup, V3P3A=V3P3D=VLCD= 32kHz 85°C OSC CONDITION Reduce V3P3 until V2P5 drops 200mV RESETZ=1, iload=0 © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 MIN TYP MAX UNIT 6.4 9.5 mA 3.7 4.3 mA 2.5 4 ...
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... Ta = -40ºC to +85º 25º 25º -40ºC to 85º 1mA, -1mA LOAD CONDITION Crystal connected © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 MIN TYP MAX UNIT 1.193 1.195 1.197 40 2.5 2 TC2 µV/°C µV/°C − ...
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... I =20mA SINK |Vin|≤300mV CONDITION T =25ºC, T =75º Nominal relationship: N(T -40ºC to +85ºC A © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 MIN TYP MAX UNIT mV -250 250 peak 1 1 μV/V -10 10 -75 dB -90 dB kΩ ...
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... With respect to VLCD*0.7 With respect to 2*VLCD/3 With respect to VLCD/2 With respect to VLCD/3 With respect to VLCD/2 ∆I =10µA LOAD CONDITION CONDITION CONDITION Vin = VBIAS - 100mV +100mV overdrive © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 MIN TYP MAX UNIT OSC/2 Hz 1.2 2.75 mA 1.2 2 ...
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... ECX-3TA series Load capacitor for crystal (depends on crystal specs and board parasitics). Bypass capacitor for VBIAS Boost charging capacitor Bypass capacitor for V2P5 Boost bypass capacitor © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 MIN TYP MAX UNIT 5 ...
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... A Maxim Integrated Products Brand Packaging Information 64-Pin LQFP PACKAGE OUTLINE (Bottom View). NOTE: Controlling dimensions are in mm. 11.7 12.3 PIN No. 1 Indicator 0.60 Typ. Page Single-Phase Energy Meter IC 11.7 12.3 9.8 10.2 0.14 0.50 Typ. 0.28 © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 0.00 0.20 1.40 1.60 V2.7 ...
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... VDRV 7 CKTEST 8 V3P3D 9 SEG4/SSDATA 10 SEG5/SFR 11 SEG37/DIO17 12 COM0 13 COM1 14 COM2 15 16 COM3 Page Single-Phase Energy Meter IC TERIDIAN 71M6511-IGT © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 RESETZ 48 V2P5 47 VBAT SEG31/DIO11 44 SEG30/DIO10 43 SEG29/DIO9 42 SEG28/DIO8 41 SEG27/DIO7 40 SEG26/DIO6 39 SEG25/DIO5 38 SEG24/DIO4 ...
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... Crystal Inputs: A 32kHz style crystal should be connected across these pins. Typically, a 20pF capacitor is also connected from each pin to GNDA important to minimize the capacitance between these pins. See the crystal manufacturer datasheet for details. Voltage boost output. © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Emulator clock. Emulator reset. This pin has an internal pull-up resistor. See the 1, 4 precautions in the Applications Section for terminating this pin. Enables Production Test. This pin must be grounded in normal I 7 operation. © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V2.7 ...
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... Comparator Input Equivalent Circuit Type 7: Comparator Input V3P3D Oscillator To Pin Oscillator GNDD Oscillator Equivalent Circuit Type 8: Oscillator I/O © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 V3P3A from VREF internal Pin reference GNDA VREF Equivalent Circuit Type 9: VREF V3P3D ...
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... Lead-Free LQFP, 0.1% accuracy, T&R Page Single-Phase Energy Meter IC ORDERING NUMBER 71M6511-IGT 71M6511-IGT/F 71M6511-IGTR 71M6511-IGTR/F 71M6511H-IGT 71M6511H-IGT/F 71M6511H-IGTR 71M6511H-IGTR/F © 2005–2010 Teridian Semiconductor Corporation 71M6511/71M6511H DATA SHEET NOVEMBER 2010 PACKAGE MARKING 71M6511-IGT 71M6511-IGT 71M6511-IGT 71M6511-IGT 71M6511H-IGT 71M6511H-IGT 71M6511H-IGT 71M6511H-IGT V2.7 ...
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... 2010 Maxim Integrated Products 71M6511/71M6511H Single-Phase Energy Meter IC DATA SHEET Maxim is a registered trademark of Maxim Integrated Products ...