71M6511 Maxim, 71M6511 Datasheet - Page 49

• Manufacturer Part Number: 71M6511
• Description: The 71M6511 and 71M6511H are highly integrated SoCs with an MPU core, RTC, flash, and LCD driver
• Manufacturer: Maxim

SFR is the framing pulse. Although CE words are always 32 bits, the SSI interface will frame the entire data block as a single
field, as multiple 16-bit fields, or as multiple 32-bit fields. The SFR pulse is one SCLK clock cycle wide, changes state on the
rising edge of SCLK and precedes the first bit of each field.
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TMUXOUT/RTM
RTM DATA0 (32 bits)
RTM DATA1 (32 bits)
RTM DATA2 (32 bits)
RTM DATA3 (32 bits)
MUX_SYNC
SSDATA (Output)
CKTEST
A Maxim Integrated Products Brand
SCLK (Output)
SFR (Output)
SRDY (Input)
MUX_SYNC
CK32
SSDATA (Output)
FLAG
SCLK (Output)
SFR (Output)
SRDY (Input)
Figure 16: SSI Timing, 16-bit Field Example (External Device Delays SRDY)
0
If SSI_CKGATE =1
1
30
31
Figure 15: SSI Timing, (SSI_FPOL = SSI_RDYPOL = 0)
31
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FLAG
30
Figure 14: RTM Output Format
SSI_BEG
16
0
15
31
1
If 16bit fields
30
30
1
31
29
0
FLAG
Single-Phase Energy Meter IC
31
Next field is delayed while SRDY is low
30
18
17
0
SSI_BEG+1
71M6511/71M6511H
16
1
16
15
If 32bit fields
30
DATA SHEET
16
31
1
16
FLAG
0
16
31
15
SSI_END
If SSI_CKGATE =1
0
14
1
1
0
13
30
NOVEMBER 2010
31
12
V2.7