71M6513 Maxim, 71M6513 Datasheet - Page 53

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71M6513

Manufacturer Part Number
71M6513
Description
The 71M6513 and 71M6513H are highly integrated SoCs with an MPU core, RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet

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The MPU will wait for the CE to signal that fresh data is ready (the XFER interrupt). It will read the data and perform additional
processing such as energy accumulation.
Reset Mode: When the RESETZ pin is pulled low or when V1 < VBIAS, all digital activity in the chip stops while analog circuits
are still active. The oscillator and RTC module continue to run. Additionally, all I/O RAM bits are cleared. As long as V1, the
input voltage at the power fault block, is greater than VBIAS, the internal 2.5V regulator will continue to provide power to the
digital section.
Once initiated, the reset mode will persist until the reset timer times out, signified by WAKE rising. This will occur in 4100
cycles of the real time clock after RESETZ goes high, at which time the MPU will begin executing its preboot and boot
sequences from address 00. See the security section for more description of preboot and boot.
A Maxim Integrated Products Brand
Mux Ctrl.
ADC
Figure 19: MPU/CE Communication (Processing Sequence)
MPU
I/O RAM (CONFIGURATION RAM)
VAR (DIO7)
Figure 18: MPU/CE Communication (Functional)
FLASH
SAMPLES
© 2005-2011 Teridian Semiconductor Corporation
CE
Fault, Reset, Power-Up
PULSES
W (DIO6)
XFER Interrupt
INTERRUPTS
CE_EN
CE_BUSY
XFER_BUSY
EXT_PULSE
APULSEW
APULSER
DATA
3-Phase Energy Meter IC
MPU
71M6513/71M6513H
COMPUTATION
DATA SHEET
CE PRAM
CE DRAM
ENGINE
LCD segments)
DISPLAY (me-
mory-mapped
(UART0/1)
EEPROM
DIO
SERIAL
(I2C)
SEPTEMBER 2011
Page: 53 of 104

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