LMH1983SQ/NOPB National Semiconductor, LMH1983SQ/NOPB Datasheet - Page 23

• Manufacturer Part Number: LMH1983SQ/NOPB
• Description: IC VID CLK GEN MULTI RATE 40LLP
• Manufacturer: National Semiconductor
• Type: Clock Generatorr

Specifications of LMH1983SQ/NOPB

• Applications: Video Equipment
• Mounting Type: Surface Mount
• Package / Case: 40-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Crosspoint Output Selection Table
Vsync Codes
Vsync codes are used by registers 0x21(Output Frame Lookup – Input Vsync Code), 0x22 (Output Frame Lookup – PLL2 Vsync
Code), and 0x23 (Output Frame Lookup – PLL3 Vsync Code).
Note 11: PLL2_Disable and PLL3_Disable can be forced via register writes to the PLLx_DISABLE Registers independently of the status of the Crosspoint Mode
bits.
Register 0x09 [3:0]
0000 (default)
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Number (binary)
Vsync Code
0 (0000)
1 (0001)
2 (0010)
3 (0011)
4 (0100)
5 (0101)
6 (0110)
7 (0111)
PLL2_disable
(Note
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0
1
0
1
0
1
0
0
1
11)
PLL3_Disable
23
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
(Note
0
1
1
0
0
0
1
1
0
11)
OUT2 Source
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PLL2
PLL1
PLL2
PLL3
PLL3
PLL1
PLL2
PLL1
PLL3
Frame Rate
23.98 Hz
29.97 Hz
59.94 Hz
24 Hz
25 Hz
30 Hz
50 Hz
60 Hz
Hz
OUT3 Source
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PLL3
PLL1
PLL2
PLL3
PLL2
PLL3
PLL1
PLL2
PLL1
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