TLE 7269G Infineon Technologies, TLE 7269G Datasheet - Page 5

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TLE 7269G

Manufacturer Part Number
TLE 7269G
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 7269G

Packages
PG-DSO-14
Transmission Ratemax
20.0 kbit/s
Quiescent Current (max.)
< 10 µA sleep mode
Bus Wake-up Capability
Yes
Additional Features
2 x LIN trx, INH, EN, WK, Vio
Wake-up Inputs
Bus wake-up + wake-up pin
3
3.1
Figure 2
Note: The pin configuration of the TLE7269G is pin compatible to the devices TLE7259G and TLE7259-2GE/GU.
3.2
Table 1
Pin No.
1
2
3
4
5
6
7
Data Sheet
In comparison to the TLE7259G and the TLE 7259-2GE/GU, no pull up resistors on the RxD pins are
required for the TLE7269G. Details can be found inside the
Transceivers” on Page
Pin Configuration
Pin Assignment
Pin Configuration (top view)
Pin Definitions and Functions
Pin Definitions and Functions
Symbol
RxD1
EN
WK
TxD1
TxD2
V
RxD2
IO
TxD1
TxD2
RxD1
RxD2
WK
EN
V
Function
Receive data output 1;
LOW in dominant state, active LOW after a Wake-Up event at BUS1 or WK pin
Enable input;
integrated pull-down, device set to normal operation mode when HIGH
Wake input;
active LOW, negative edge triggered, internal pull-up
Transmit data input 1;
integrated pull-down, LOW in dominant state; active LOW after Wake-Up via WK pin
Transmit data input 2;
integrated pull-down, LOW in dominant state
Logic Voltage supply input;
3.3V or 5V supply for the RxD and TxD pins
Receive data output 2;
LOW in dominant state, active LOW after a Wake-Up event at BUS2
IO
28.
1
2
3
4
5
6
7
5
14
13
12
11
10
9
8
“Pin Compatibility to the Single LIN
INH1
GND
W2O
INH2
BUS1
BUS2
V
S
Rev. 1.2, 2007-11-13
Pin Configuration
TLE7269G

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