74LVQ245SJ Fairchild Semiconductor, 74LVQ245SJ Datasheet

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74LVQ245SJ

Manufacturer Part Number
74LVQ245SJ
Description
IC TRANSCVR TRI-ST 8BIT 20SOP
Manufacturer
Fairchild Semiconductor
Series
74LVQr
Datasheet

Specifications of 74LVQ245SJ

Logic Type
Transceiver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
12mA, 12mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2001 Fairchild Semiconductor Corporation
74LVQ245SC
74LVQ245SJ
74LVQ245QSC
74LVQ245
Low Voltage Octal Bidirectional Transceiver
with 3-STATE Outputs
General Description
The LVQ245 contains eight non-inverting bidirectional buff-
ers with 3-STATE outputs and is intended for bus-oriented
applications. Current sinking capability is 12 mA at both the
A and B ports. The Transmit/Receive (T/R) input deter-
mines the direction of data flow through the bidirectional
transceiver. Transmit (active-HIGH) enables data from A
ports to B ports; Receive (active-LOW) enables data from
B ports to A ports. The Output Enable input, when HIGH,
disables both A and B ports by placing them in a HIGH Z
condition.
Ordering Code
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Truth Table
H
Order Number
HIGH Voltage Level
OE
H
L
L
Inputs
Package Number
T/R
H
X
L
L
IEEE/IEC
LOW Voltage Level
MQA20
M20B
M20D
Bus B Data to Bus A
Bus A Data to Bus B
HIGH-Z State
Outputs
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
X
DS011357
Immaterial
Features
Connection Diagram
Pin Descriptions
Ideal for low power/low noise 3.3V applications
Implements patented EMI reduction circuitry
Available in SOIC JEDEC, SOIC EIAJ and QSOP
packages
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Improved latch-up immunity
Guaranteed incident wave switching into 75
4 kV minimum ESD immunity
Pin Names
OE
T/R
A
B
0
0
–A
–B
Package Description
7
7
Output Enable Inputs
Transmit/Receive Input
3-STATE Outputs
3-STATE Outputs
Side A Inputs or
Side B Inputs or
Description
February 1992
Revised June 2001
www.fairchildsemi.com

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74LVQ245SJ Summary of contents

Page 1

... Ordering Code Order Number Package Number 74LVQ245SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LVQ245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVQ245QSC MQA20 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Devices also available in Tape and Reel. Specify by appending suffix letter “ ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...

Page 3

AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL t PLH t Output Enable Time PZL t PZH t Output Disable Time PHZ t PLZ t Output to Output OSHL t Skew (Note 9) OSLH Note 9: Skew is defined ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...

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