IS61C1024-12T Integrated Silicon Solution, IS61C1024-12T Datasheet

IS61C1024-12T

Manufacturer Part Number

IS61C1024-12T

Description

Manufacturer

Integrated Silicon Solution

Datasheets

1.IS61C1024L-15T.pdf (10 pages)

2.IS61C1024L-15T.pdf (10 pages)

3.IS61C102415K.pdf (11 pages)

Available stocks

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Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

IS61C1024-12TI

Manufacturer:

ISSI

Quantity:

2 148

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IS61C1024

IS61C1024L

128K x 8 HIGH-SPEED

CMOS STATIC RAM

FEATURES

• High-speed access time: 12, 15, 20, 25 ns

• Low active power: 600 mW (typical)

• Low standby power: 500 W (typical) CMOS

• Output Enable (

• Fully static operation: no clock or refresh

• TTL compatible inputs and outputs

• Single 5V ( 10%) power supply

• Low power version available: IS61C1024L

• Commercial and industrial temperature ranges

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which

SR028-1K

05/12/99

standby

(

required

available

CE1

and CE2) inputs for ease in applications

FUNCTIONAL BLOCK DIAGRAM

) and two Chip Enable

I/O0-I/O7

A0-A16

VCC

GND

CE1

CE2

DECODER

CIRCUIT

CONTROL

CIRCUIT

DATA

I/O

DESCRIPTION

The

low power, 131,072-word by 8-bit CMOS static RAMs. They

are fabricated using ISSI 's high-performance CMOS

technology. This highly reliable process coupled with innovative

circuit design techniques, yields higher performance and low

power consumption devices.

When

assumes a standby mode at which the power dissipation can

be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip Enable

inputs,

controls both writing and reading of the memory.

The IS61C1024 and IS61C1024L are available in 32-pin

300-mil SOJ, and TSOP (Type I, 8x20), and sTSOP (Type I,

8 x 13.4) packages.

ISSI

CE1

IS61C1024 and IS61C1024L are very high-speed,

is HIGH or CE2 is LOW (deselected), the device

MEMORY ARRAY

and CE2. The active LOW Write Enable (

COLUMN I/O

512 x 2048

ISSI

MAY 1999

)

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