A43L0632G-7UF AMIC Technology, Corp., A43L0632G-7UF Datasheet - Page 8

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A43L0632G-7UF

Manufacturer Part Number
A43L0632G-7UF
Description
512K x 32-Bit x 2 Banks Synchronous DRAM
Manufacturer
AMIC Technology, Corp.
Datasheet
Operating AC Parameter
(AC operating conditions unless otherwise noted)
Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
PRELIMINARY
Symbol
t
t
t
t
t
t
t
t
RRD(min)
RCD(min)
t
RAS(max)
t
CCD(min)
RAS(min)
CDL(min)
RDL(min)
BDL(min)
RC(min)
RP(min)
2. Minimum delay is required to complete write.
then rounding off to the next higher integer.
Row active to row active delay
Row precharge time
Row active time
Row cycle time
Last data in new col. Address delay
Last data in row precharge
Last data in to burst stop
Col. Address to col. Address delay
RAS to
(August, 2005, Version 0.0)
CAS
delay
Parameter
7
100
12
18
18
42
60
-6
Version
1
2
1
1
AMIC Technology, Corp.
100
14
20
20
49
68
-7
CLK
Unit
CLK
CLK
CLK
µ s
ns
ns
ns
ns
ns
A43L0632
Note
1
1
1
1
1
2
2
2

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