STE2007 STMicroelectronics, STE2007 Datasheet
STE2007
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STE2007 Summary of contents
Page 1
... Display Supply Voltage range from 3 to 13. 25°C) amb Description The STE2007 is a low power LCD driver, capable to drive 96 columns and lines, designed for monochrome displays. The STE2007 includes fully integrated bias voltage generator ( multiplication factor), and internal oscillator, thus reducing to minimum the number of external components required and the current consumption ...
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... MCU TxData Mode (Write Mode 4.2.2 Driver TxData Mode (Read Mode 4 Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.3.1 Communication Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.3.2 Starting the Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.3.3 MCU TxData Mode (Write Mode 4.3.4 Driver TxData Mode (Read Mode 4.4 Reading Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.4.1 IIdentification byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5 Display Data RAM (DDRAM 5.1 DDRAM and Page/column address circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2/62 STE2007 ...
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... STE2007 5.2 Line address circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.3 Partial Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.3.1 33 Line Partial Display Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.3.2 25 Line Partial Display Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.3.3 17 Line Partial Display Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.3.4 9 Line Partial Display Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.4 Command Parameters Default Configuration . . . . . . . . . . . . . . . . . . . . . . . . 38 6 Instruction Setups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 6.1 Initialization (Power ON Sequence 6.2 Display Data Writing Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 6.3 Power OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 7 Power ON/Power OFF timing Sequence ...
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... Bias Ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 8.18 Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 8.19 Charge Pump Multiplication Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 8.20 Refresh Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 8.21 Icon Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 8.22 N- Line Inversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 8.23 Number of Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9 Chip Mechanical Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 4/62 STE2007 ...
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... STE2007 1 Introduction In this document is specified LCD driver for Black&White full graphic displays with a resolution of 96x68, 96x65, 96x49, and 96x33 (ColumnsXRows). Abbreviations LCD Liquid Crystal Display COG Chip On Glass –technology MCU Micro Controller Unit DDRAM Display Data Random Access Memory MSB Most Significant Bit ...
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... Introduction Figure 1. Chip Mechanical Drawing 6/62 R66 STE2007 BUMP SIDE (0, 45µm VSS_AUX 72µm VSS_AUX VSS_AUX VSS_AUX R67 R65 STE2007 ...
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... STE2007 2 Driver Pin Description 2.1 CPU Interface Pins Table 2. CPU Interface Logic PIN Signal !RES !CS SDOUT SDAIN SCLK SDA_OUT SA1 SA0 !D/C 2.2 Power Supply Pins Table 3. Power Supply Pins PIN Signal VSS VSS_LCD VSS_CP VDDI VDD VDD_CP VSSAUX Table 4. High Voltage Pins PIN ...
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... Not Used IDA=”0” IDA=”1” IDB=”0” IDB=”1” Note Must Be connected to VSS in Normal Working Mode Must Be connected to VSS in Normal Working Mode Must Be connected to VSS in Normal Working Mode Must Be OPEN in Normal Working Mode STE2007 Note Note ...
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... STE2007 Table 6. Test Pin Description (continued) PIN Signal VREF_B UFF Type Description O Test Output. O Test Output. O Test Output. O Analog Test Output 2 Driver Pin Description Note Must Be OPEN in Normal Working Mode Must Be OPEN in Normal Working Mode Must Be OPEN in Normal Working Mode ...
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... Test Condition: CDF-AEC-Q100-002- “Human Body Model” All other pins / pin Acceptance Criteria: “Normal Performance” combination Note: (*) ESD tests have been performed with VSS, VSS_LCD and VSS_CP shorted together 10/62 Parameter = 85°C) j STE2007 Value Unit - ...
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... STE2007 3.2 DC Characteristics Table 8. DC characteristics Symbol Parameter V V Power Supply Voltage DD, DDCP V Power Supply Voltage(Logic) DDI V Booster Output LCD V Booster Sense Input LCD_SENSE V LCD Supply Voltage Accuracy LCD I(V ) Logic Supply Current DDI I Analog Supply Current DD DDCP Logic Inputs V Logic High level input voltage ...
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... Serial clock L tslw pulse width tcss tchw tslw tf tr tsds Min. Typ. Max Min. Typ. 60 100 50 100 100 0 25 250 100 100 tchw tcsh tscyc tshw tsdh STE2007 Unit 82 Hz Max. Unit 125 ns 100 ns 100 ...
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... STE2007 Table 11. Input Signals Change Time Signal Symbol Parameter Inputs tr,tf 3.4.1 Driver TxData Mode Table 12. Timings based on 4 MHz SCLK Speed Item Data hold time Access time Output disable time Data setup time !CS pulse width high Note: 1 Data Hold Time T1 depends on SCLK high time and Max Data Hold time Always 3-8ns before SCLK pulse falling edge 2 The input signal rise and fall times must be within 10ns ...
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... Timing A Command Hi± Hi±Z Hi±Z Status T1 T2 Timing Timing B out T5 1/2 SCLK Signal Symbol !RES trs !RES trw !RES trj Timing B Command Tx Hi±Z out T4 D/C in 1/2 SCLK Min. Max. 2500 2500 1000 STE2007 Unit ns ...
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... STE2007 Figure 4. trj !RES Internal circuit status 3 Display Driver Electrical Characteristics trw trs During reset Normal operation 15/62 ...
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... Serial data must be input to SDA in the sequence D/! D0. STE2007 read data on SCLK rising edge. The first bit of serial data D/!C is data/command flag. When D/!C =”1” bits are display RAM data or Command Parameters. When D/!C=” ...
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... It is possible while transferring Frame Memory Data, Commands or Command Parameters to insert a pause in the data transmission (!CS Line HIGH after 8 Bits Received). When !CS is forced high after a whole byte received, the received byte is processed. Then STE2007 is forced in a wait state ready to restart processing incoming data from the point where the ...
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... The serial data output (SDAOUT/Driver TxData) and serial clock input (SCLK) are enabled when !CS is low after having received one Reading Command. To access Driver TxData–mode a Reading command must be sent to STE2007 driver. The first bit (D/C) is low to indicates next 8–bits are for command. The data is read to the driver on the rising edge of SCLK (see section ” ...
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... MCU TxData D/C='0' 0 Driver TxData !CS MCU TxData begins 4.2 4-Line SPI STE2007 4-lines serial interface is a bidirectional link between the display driver and the host processor. It consists of four lines: – SDA Serial Data – SCL Serial Clock – !CS Peripheral enable: - Active Low- Enables and Disables the serial interface – ...
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... When !CS line becomes low again to start a new communication session STE2007 is ready to receive the same byte interrupted re-transmitted or a new command identifier. Figure 12. 4-lines SPI Data Transfer break condition ...
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... STE2007 If a new command identifier is transferred after a pause condition the previous communication session is definitively closed. Four are the possible conditions: – Command-Pause-Command – Command-Pause-Parameter – Parameter-Pause-Command – Parameter-Pause-Parameter Figure 13. 4-lines SPI Data Transfer Pause !CS D/!C SCL SDA D3 COMMAND/PARAMETER 4.2.2 Driver TxData Mode (Read Mode) Throughout SDA line is possible to read some registers value (ID Numbers, Status byte, temperature) ...
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... Indium Tin Oxide (ITO) track resistance possible that during the acknowledge cycle the STE2007 will not be able to create a valid logic 0 level. By splitting the SDA input from the output the device could be used in a mode that ignores the acknowledge bit ...
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... DATA OUTPUT BY RECEIVER 4.3.1 Communication Protocol The STE2007 status read are allowed. Four are the device addresses available for the device. All have in common the first 5 bits (01111). The two least significant bit of the slave address are set by connecting the SA0 and SA1 inputs to a logic logic 1 ...
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... INTERFACE 4.3.3 MCU TxData Mode (Write Mode) If the R/W bit is set to logic 0 the STE2007 is set receiver and the master can send commands or data. After the communication has started and slaves have acknowledged, the master sends a control byte defined as follows and waits for its acknowledgement: The Co bit is the control byte MSB and defines if after this control byte will follow a single byte sequence ( multiple bytes sequence ( ...
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... First Command Byte STE2007 ACK STE2007 ACK Co D DATA Byte A Control Byte Data Byte STE2007 ACK STE2007 ACK Co D DATA Byte A Control Byte First Data Byte I2C STOP COND STE2007 ACK I2C START ...
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... INTERFACE 4.4 Reading Mode STE2007 features a reading Command to transmitt data from the LCD driver to Host Processor. After the reading command STE2007 transfers 8 bits to the Host controller: – Identification Byte (Command Code DB 4.4.1 IIdentification byte Identification byte Bit code that identify the module revision Number. ...
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... STE2007 5 Display Data RAM (DDRAM) 5.1 DDRAM and Page/column address circuit The DDRAM stores pixel data for LCD 68–row (8 page by 8 bits +4) by 96–column addressable array display data from MCU corresponds to the LCD common direction. ”0” bit in DDRAM is a OFF–dot on display and ”1” bit in DDRAM is displayed as ON–dot on display ...
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... The line address circuit specifies the line address relating to the COM output when the contents of the DDRAM are displayed. The display start line that is normally the top line of the display, can be specified by Display start line address set command. STE2007 features Four different Multiplexing Mode to fine tune the duty ratio on the display size: – ...
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... STE2007 Figure 23. 68–line Mode D Page address ...
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... STE2007 ICONMODE="0" ICONMODE="1" COM Output COM Output Line Normal Reverse Address Normal direction direction direction COM0 COM63 00H COM0 COM1 COM62 01H COM1 COM2 COM61 02H ...
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... STE2007 Figure 25. 49–line Mode D Page address ...
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... G Direction 5.3 Partial Display STE2007 feature four configuration for Partial Display function: – 33 Line Partial Display – 25 Line Partial display – 16 Line Partial Display – 9 Line Partial Display Partial display Area location on the screen is defined by Image Location Parameter. Image Location + Partial display area > Multiplexing rate. ...
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... STE2007 Figure 27. Display Image Location + Partial display area width <= Multiplexing rate When Partial Display Mode is enabled the user has to Update the Operative Voltage, Bias Ratio and Charge Pump Setting to match the new working conditions. 5.3.1 33 Line Partial Display Mode Partial Display Area is composed of 33 Lines. Memory vs. Row Drivers Mapping is defined according to the following parameters: – ...
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... COM63 COM63 COM3 3FH COM64 COM64 COM2 40H COM65 COM1 41H COM65 COM66 COM0 42H COM66 COMS COMS COMS 43H STE2007 COM Output Reverse direction COMS COM66 COM65 COM64 COM63 COM62 COM61 COM60 COM59 COM58 COM57 COM56 COM55 COM54 COM53 COM52 ...
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... STE2007 5.3.2 25 Line Partial Display Mode Partial Display Area is composed of 25 Lines. Memory vs. Row Drivers Mapping is defined according to the following parameters: – Multiplexing Value – IL[2:0] Figure 30. Example: Partial Display 25 lines & MUX65 D Page address Page ...
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... COM61 COM2 3DH COM61 COM62 COM1 3EH COM62 COM63 COM0 COM63 3FH COM64 COM64 COM64 40H 41H 42H 43H STE2007 COM Output Reverse direction COM64 COM63 COM62 COM61 COM60 COM59 COM58 COM57 COM56 COM55 COM54 COM53 COM52 COM51 COM50 COM49 ...
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... STE2007 5.3.4 9 Line Partial Display Mode Partial Display Area is composed of 9 Lines. Memory vs. Row Drivers Mapping is defined according to the following parameters: – Multiplexing Value – IL[2:0] Figure 32. Partial Display 9 Lines D Page address Page ...
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... Booster OFF 0hex 0hex 5x 5x 1/10 1/10 0ppm 0ppm Frame Inv. Frame Inv. 1/68 1/68 80Hz 80Hz 0hex 0hex Disabled Disabled STE2007 After SW Reset Description MCU TxData– mode Power Saver Mode All Pixel On OFF OFF No Change 0hex 0hex 0hex Normal Normal 4hex 90hex Booster OFF ...
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... STE2007 6 Instruction Setups 6.1 Initialization (Power ON Sequence) Power saver OFF (Display all points OFF (A4H)) 6.2 Display Data Writing Sequence Column address set Upper 3-bit address (1*H) Column address set Lower 4-bit address (0*H) 6.3 Power OFF Power ON Reset status V0-Voltage Range (**H) Electronic volume (**H) Power control set (2FH) ...
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... Trs = max. 5µs Reset State tp1 < 0 tpi >0µs High-Z tcs >0µs tcs >0µs t >0 ms PWROFF1 t >20ms PWROFF2 tp2 >0µs trs = max. 5µs Trs = max. 5µs Reset State STE2007 tp1 > 0 tpi >0µs High-Z Reset State tp1 < 0 tpi >0µs High-Z Reset State ...
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... STE2007 Table 18. Instruction Set Command (D/C) D7 Display ON/OFF 0 Display normal/ 0 reverse Display all points ON/ 0 OFF Page address set 0 Column address set 0 upper 3–bit address Column address set 0 lower 4–bit address Display start line 0 address set Segment driver 0 direction Common driver 0 direction select ...
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... Reserved for STM (STM Test 1 AB Mode) Reserved for STM (STM Test 0 A8 Mode) Reserved for STM (STM Test 1 FF Mode) Reserved for STM (STM Test 0 FC Mode) Reserved for STM (STM Test 0 FE Mode) Reserved for STM (STM Test 1 FD Mode) STE2007 ...
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... STE2007 8 Commands 8.1 Display ON/OFF This command turns the display ON and OFF Table 19. Display ON/OFF (D/ When the Display OFF command is executed in the Display all points ON mode, Power saver mode is entered. See the section on the Power saver for details. ...
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... HEX Setting Setting Upper bit address Lower bit address Column address 00H 01H 02H 5EH 5FH STE2007 ...
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... STE2007 8.6 Display start line address set This command is used to specify the display start line address of the DDRAM. If the display start line address is changed dynamically using this command, then screen scrolling, page swapping can be performed. Table 24. Display start line address set (D/ ...
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... HEX Setting DB Reads ID byte Pad Default HEX Setting Booster : OFF 2B Voltage Regulator:OFF Voltage Follower : OFF Booster : ON 2F Voltage regulator : ON Voltage follower : ON STE2007 D0 ...
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... STE2007 8.12 VLCD set The LCD Voltage VLCD at reference temperature (T Range V0R, Electronic Volume EV and VOP registers content according to the following formula: VLCD (T=T with the following values: Symbol B VLCD MIN T A For information on VLCD thermal compensation see PAR. 8.18 . Figure 35. Vout 13.20V 3V 00h Figure 36 ...
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... STE2007 V0R 32 · V0R · VLCD Value 8.12 V (Default 10. 11.96 V HEX Function E1 Command Identifier Data Field VOP Adjustment 0 Step (Default) +1 Step +2 Step : +127 Step ...
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... STE2007 8.12.3 Electronic volume This command sets a value of electronic volume EV for the VLCD voltage regulator, to adjust the contrast of LCD panel display (End User). Table 34. Electronic volume (D/ Table 35. EV (D/ 8.13 Power saver mode If the display all points ON command is executed when the display is in display OFF mode, power saver mode is entered ...
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... HEX HEX HEX IL2 IL1 IL0 Function 16 Lines 24 Lines 32 Lines 48 Lines 56 Lines 64 Lines STE2007 Function Command Identifier Function Command Identifier Function Command Identifier Data Field 0 Lines 8 Lines ...
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... STE2007 8.17 Bias Ratio It is possible to select different Bias Ratio. Table 40. Bias Ratio (D/ Table 41. BIAS Ratio BR2 BR1 BR0 Table 42. Bias levels Generator BR=000 V LCD ...
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... Temperature (Room Temperature Value TC= 0 PPM TC= -300 PPM TC= -600 PPM TC= -900 PPM TC= -1070 PPM TC= -1200 PPM TC= -1500 PPM TC= -1800 PPM HEX CP1 CP0 D0 HEX Function 0 38 Command Identifier Data Field ) · TC] A Function Command Identifier Data Field STE2007 ...
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... STE2007 Table 46. Charge Pump Multiplication Factor CP1 CP0 8.20 Refresh Rate It is possible to select different Refresh Rate. Table 47. Refresh Rate (D/ Table 48. Refresh Rate RR1 RR0 8.21 Icon Mode Icon Mode – ...
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... N-line inversion enabled 8.23 Table 52 Function 68 Lines (Default) 65 Lines 49 Lines 33 Lines 33 Lines Partial Display 25 Lines Partial Display 17 Lines Partial Display 9 Lines Partial Display N row Number of Lines Multiplexing Rate setting command. Number of Lines D0 Function M0 Command Identifier + Data Field STE2007 ...
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... STE2007 9 Chip Mechanical Drawing Table 54. Mechanical Dimensions Parameter Wafer Thickness Die Size ( Bumps Size on Columns and Segments Side Pad Size on Columns and Segments Side Bumps Pitch on Columns and Segments Side Bumps Size on Interfaces Side Pad Size on Interfaces Side Bumps Pitch on Interfaces Side ...
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... C35 -514.35 C36 -514.35 C37 -514.35 C38 -514.35 C39 -514.35 C40 -514.35 C41 -514.35 C42 -514.35 C43 -514.35 C44 -514.35 C45 -514.35 C46 STE2007 PAD X(µm) Y(µm) 29 -1372.5 -514.35 30 -1327.5 -514.35 31 -1282.5 -514.35 32 -1237.5 -514.35 33 -1192.5 -514.35 34 -1147.5 -514.35 35 -1102.5 -514 ...
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... STE2007 Table 55. Pad Coordinates (continued) NAME PAD X(µm) C47 57 -112.5 C48 58 112.5 C49 59 157.5 C50 60 202.5 C51 61 247.5 C52 62 292.5 C53 63 337.5 C54 64 382.5 C55 65 427.5 C56 66 472.5 C57 67 517.5 C58 68 562.5 C59 69 607.5 C60 70 652.5 C61 71 697.5 C62 72 742.5 C63 73 787 ...
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... VSS_CP 270.0 VSS_CP 315.0 DC 360.0 SDAOUT 405.0 SDIN 450.0 SDOUT 514.35 SCLK 514.35 VREF_BUFF 514.35 VSS_AUX 514.35 SEL1 517.5 SEL0 STE2007 PAD X(µm) Y(µm) 141 2304.0 517.5 142 1944.0 517.5 143 1872.0 517.5 144 1800.0 517.5 145 1728.0 517.5 146 1584.0 517 ...
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... STE2007 Table 55. Pad Coordinates (continued) NAME PAD X(µm) SA1 169 -288.0 SA0 170 -360.0 IDB 171 -432.0 IDA 172 -504.0 OSC_IN 173 -576.0 VDDI 174 -720.0 VDDI 175 -792.0 VDDI 176 -864.0 VDDI 177 -936.0 VDDI 178 -1008.0 VDDI 179 -1080.0 ...
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... Chip Mechanical Drawing Table 56. Alignment marks coordinates MARKS X Mark1 -2834.55 Mark2 2834.55 Mark3 -2834.55 Mark4 2834.55 Mark5 2205.0 60/62 Figure 38. Alignment marks dimensions Y 517.05 517.05 -517.05 -517.05 517.05 STE2007 35 µm 85 µm ...
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... STE2007 10 Revision history Date Revision 9-Nov-2005 1 Initial release. 10 Revision history Changes 61/62 ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 62/62 All other names are the property of their respective owners © 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com STE2007 ...