STE2007 STMicroelectronics, STE2007 Datasheet - Page 33
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STE2007
Manufacturer Part Number
STE2007
Description
96 x 68 Single Chip LCD Controller/Driver
Manufacturer
STMicroelectronics
Datasheet
1.STE2007.pdf
(62 pages)
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STE2007
5.3.1
Figure 28. Example: Partial Display 33 lines & MUX65
Figure 27.
When Partial Display Mode is enabled the user has to Update the Operative Voltage, Bias Ratio
and Charge Pump Setting to match the new working conditions.
33 Line Partial Display Mode
Partial Display Area is composed of 33 Lines. Memory vs. Row Drivers Mapping is defined
according to the following parameters:
Image Location + Partial display area width <= Multiplexing rate
Page address
D3
Column address
0
0
0
0
0
0
0
0
1
SEG
Output
–
–
D2 D1 D0
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
Normal
Direction
Reverse
Direction
0
1
0
1
0
1
0
1
0
Multiplexing Value
IL[2:0]
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D
a
a
t
00H 01H 02H
S
E
G
S
E
G
95
0
94
S
E
G
S
E
G
1
93
S
E
G
S
E
G
2
03H 04H 05H
S
E
G
S
E
G
92
3
S
E
G
S
E
G
91
4
Display
90
S
E
G
S
E
G
5
06H
89
S
E
G
S
E
G
6
Page 2
Page 0
Page 1
Page 3
Page 4
Page 5
Page 7
Page 8
Page 6
59H 5AH 5BH
S
E
G
89
S
E
G
6
90
S
E
G
S
E
G
5
91
S
E
G
S
E
G
4
5CH 5DH 5EH
S
E
G
92
S
E
G
3
93
S
E
G
S
E
G
2
94
S
E
G
S
E
G
1
5FH
S
E
G
95
S
E
G
0
Line
Address
43H
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2AH
2BH
2CH
2DH
2EH
2FH
30H
31H
32H
33H
34H
35H
36H
37H
38H
39H
3AH
3BH
3CH
3DH
3EH
3FH
40H
41H
42H
Display start line does not access 65th, 66th, 67th, 68th line
Start
IL[2:0]
Image Location + Partial display area width > Multiplexing rate
ICONMODE="1"
Normal
direction
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
COM48
COM49
COM50
COM51
COM52
COM53
COM54
COM55
COM56
COM57
COM58
COM59
COM60
COM61
COM62
COM63
COMS0
COM Output
Reverse
direction
COM63
COM62
COM61
COM60
COM59
COM58
COM57
COM56
COM55
COM54
COM53
COM52
COM51
COM50
COM49
COM48
COM47
COM46
COM45
COM44
COM43
COM42
COM41
COM40
COM39
COM38
COM37
COM36
COM35
COM34
COM33
COM32
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
COM0
COMS0
Line
Address
40H
41H
42H
43H
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2AH
2BH
2CH
2DH
2EH
2FH
30H
31H
32H
33H
34H
35H
36H
37H
38H
39H
3AH
3BH
3CH
3DH
3EH
3FH
Start
IL[2:0]
5 Display Data RAM (DDRAM)
Display
ICONMODE="0"
Normal
direction
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
COM48
COM49
COM50
COM51
COM52
COM53
COM54
COM55
COM56
COM57
COM58
COM59
COM60
COM61
COM62
COM63
COMS0
COM Output
Reverse
direction
COMS0
COM63
COM62
COM61
COM60
COM59
COM58
COM57
COM56
COM55
COM54
COM53
COM52
COM51
COM50
COM49
COM48
COM47
COM46
COM45
COM44
COM43
COM42
COM41
COM40
COM39
COM38
COM37
COM36
COM35
COM34
COM33
COM32
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
COM0
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