S1D10605 Epson Electronics America, Inc., S1D10605 Datasheet - Page 380

• Manufacturer Part Number: S1D10605
• Description: S1d15000 Series Lcd Driver With Ram
• Manufacturer: Epson Electronics America, Inc.

Display Data RAM
Display data RAM
This display data RAM stores display dot data and
consists of 65 (8 pages
Desired bits can be accessed by specifying page and
column addresses.
Since the MPU display data D7 to D0 correspond to the
common direction of the liquid crystal display, the
restrictions at display data transfer is reduced and the
Page address circuit
As shown in Fig. 4, the page address of the display data
RAM is specified using the page address set command.
To access the data using a new page, the page address is
respecified.
The page address 8 (D3,D2,D1,D0=1,0,0,0) is an
indicator dedicated RAM area and only the display data
D0 is valid.
Column address circuit
As shown in Fig. 4, an address on the column side of the
display data RAM is specified using the column address
set command. Since the specified address is incremented
Line address circuit
When displaying contents of the display data RAM, the
line address circuit is used for specifying the
corresponding addresses. See Figure 4. Using the
display start line address set command, the top line is
normally selected (when the common output state is
normal, COM0 is output. And, when reversed, the
S1D15705
outputs COM31 and S1D15708
Rev. 3.1a
ADC
(D0)
SEG output
*****
“0”
“1”
outputs COM63, S1D15707
D0
D1
D2
D3
D4
—
C7 (H) Column Address
0 (H)
SEG0
one 8 bit + 1)
0
1
0
0
1
Display data RAM
1
0
0
1
0
1
0
0
1
0
S1D15705
Column Address
1
0
0
1
0
*****
0
0
0
0
0
200 bits.
outputs
*****
*****
EPSON
SEG167
Table 4
Fig. 3
A7 (H)
20 (H)
display configuration with the high degree of freedom
can easily be obtained when the S1D15705 series is
used for the multiple chip configuration.
Besides, the read/write operation to the display data
RAM is performed through the I/O buffer from the
MPU side independently of the liquid crystal drive
signal read. Therefore even when the display data RAM
is asynchronously accessed during liquid crystal display,
the access will not have any adverse effect on the
display such as flickering.
by 1 whenever the display data read/write command is
input, the MPU can successively access the display
data.
Besides, the column address stops the increment at the
column C7H. Since the column and page addresses are
independent each other, for example, the page and
column addresses need to be respecified respectively to
move from the column C7H of page 0 and column 00H.
Further, as shown in Fig. 4, the correspondence
relationship between the column address of the display
data RAM and the segment address can be reversed
using the ADC command (segment driver direction
select command). Therefore the IC assignment
restrictions at LCD module assembly are reduced.
COM15). For the S1D15705
of 65 lines is secured starting from the specified display
start line address in the address incrementing direction.
And, 33 lines are provided for the S1D15707
17 lines are provided for the S1D15708
Dynamically changing the line address using the display
start line address set command enables screen scrolling
and page change.
COM0
COM1
COM2
COM3
COM4
—
S1D15707
C7 (H) Column Address
0 (H)
SEG0
Liquid crystal display
Column Address
*****
/ S1D15708
*****
S1D15705 Series
SEG199
, the display area
*****
C7 (H)
0 (H)
*****
*****
10–21
.
,