S1D15715 Epson Electronics America, Inc., S1D15715 Datasheet - Page 20

• Manufacturer Part Number: S1D15715
• Description: Liquid Crystal Display =lcd Driver
• Manufacturer: Epson Electronics America, Inc.

S1D15715 Series Technical Manual
6.1.3 Serial interface
When the serial interface has been selected (P/S=LOW), then when the chip is in active state (
serial data input (SI) and the serial clock input (SCL) can be received.
The serial interface consists of an 8-bit shift register and a 3-bit counter.
The serial data is read from the serial data input pin in the rising edge of the serial clocks D7, D6 through D0, in
this order. This data is converted to 8 bits parallel data in the rising edge of the eighth serial clock for the
processing.
The A0 input is used to determine whether the serial data input is display data or command data; when
A0=HIGH, the data is display data, and when A0=LOW, then the data is command data.
The A0 input is read and used for detection every 8×n-th rising edge of the serial clock after the chip becomes
active.
Fig.1 is a serial interface signal chart.
___
SCL
A0
6.1.4 Chip select
The MPU interface (either parallel or serial) is enabled only when
When the chip select is inactive, D0 to D7 enter a high impedance state, and A0,
disabled. When the serial interface is selected, the shift register and the counter are reset.
14
CS
SI
When the chip is inactive, the shift register and the counter is reset to the initial state.
Data read is not available as long as the serial interface is selected.
Reasonable care must be exercised so that SCL signal may not be exposed undesirable effects
resulting from, for instance, terminal reflection of wiring or external noises. Before using the signal,
it is recommended to test the signal in actual system.
D
1
7
D
2
6
D
3
5
D
4
4
D
5
3
EPSON
Fig.1
D
6
2
D
7
1
___
CS =LOW.
D
8
0
D
9
7
D
10
6
D
11
5
___
RD and
D
12
4
D
___
WR inputs are
___
CS =LOW) the
13
3
D
14
2
Rev.1.0