S1D15715 Epson Electronics America, Inc., S1D15715 Datasheet - Page 21

• Manufacturer Part Number: S1D15715
• Description: Liquid Crystal Display =lcd Driver
• Manufacturer: Epson Electronics America, Inc.

6.1.5 Access to DDRAM and internal registers
In accessing the DDRAM and the internal registers of the S1D15715 Series, the MPU is required to satisfy the
only cycle time (
at higher speed.
In order to realize the higher speed accessing, the S1D15715 Series can perform a type of pipeline processing
between LSIs using bus holder of internal data bus when data is sent from/to the MPU.
For example, when the MPU writes data to the DDRAM, once the data is stored in the bus holder, then it is
written to the DDRAM before the next data write cycle.
And when the MPU reads the contents of the DDRAM, the first data cycle (dummy read cycle) stores the read
data in the bus holder, and then the data is read from the bus holder to the system bus at the next data read cycle.
Thus, there is a certain restriction in the DDRAM read sequence. When an address is set, the specified address
data is NOT output at the immediately following read instruction. The address data is output during second
data read.
A single dummy read must be inserted after address setup and after write cycle.
Rev.1.0
MPU
Internal Timing
MPU
Internal Timing
Read Signal
Column Address
Bus Holder
Bus holder
Write Signal
Address Preset
___
WR
Data
___
WR
___
Data
RD
t
CYC
), and is not needed to consider the wait time. Accordingly, it is possible to transfer data
Address Set
N
N
#n
N
Latch
Preset
N
N
Write
Read
EPSON
Fig.2
N+1
N
Dummy
Read
N+1
S1D15715 Series Technical Manual
Increment
n
N+2
N+1
Data Read
n
N+2
#n
N+2
n+1
Data Read
N+3
n+1
#n+1
N+3
n+2
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