S1D15715 Epson Electronics America, Inc., S1D15715 Datasheet - Page 38

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S1D15715

Manufacturer Part Number
S1D15715
Description
Liquid Crystal Display =lcd Driver
Manufacturer
Epson Electronics America, Inc.
Datasheet
S1D15715 Series Technical Manual
7.4 Page address set
This command specifies the page address that corresponds to the low address when accessing the DDRAM
from the MPU side (refer to Fig.4).
Specifying the page address and column address enables the access to a desired bit of the DDRAM.
Even when the page address is changed, the display state will not be changed. For details, see the Page
address circuit of the “Functional Description”.
After the last column address (65H), page address is incremented by +1 (refer to Fig.5).
After the very last address (column=65H, page=3H), page address returns to 0H.
Page address 7H is the DDRAM area dedicate to the indicator, and only D0 is valid for data change.
See the function explanation in “DDRAM and page/column address circuit”, for details.
7.5 Column address set
This command specifies the column address of the DDRAM (refer to Fig.4).
The column address is split into two sections (the upper 3-bits and lower 4-bits) when it is set (fundamentally,
set continuously).
Each time the DDRAM is accessed, the column address automatically increments, making it possible for the
MPU to continuously read and write the display data
After the last column address (65H), column address returns to 00H (refer to Fig.5).
See the function explanation in “DDRAM and page/column address circuit”, for details.
32
A0
A0
0
0
___
RD
___
RD
E
1
E
1
R/
R/
___
WR
___
WR
0
0
__
__
W
W
D7
D7
1
0
D6
D6
A6
0
0
0
0
0
1
1
D5
D5
A5
1
0
0
0
0
1
1
D4
D4
A4
1
1
0
0
0
0
0
0
EPSON
D3
D3
A3
A3
0
0
0
0
0
0
0
:
D2
D2
A2
A6
A2
0
0
0
0
1
0
0
0
1
1
D1
D1
A5
A1
A1
0
0
1
1
0
0
0
1
0
0
D0
D0
A0
A4
A0
0
1
0
1
0
0
1
0
0
1
Upper bit address
Lower bit address
Column address
Page address
Setting
00H
01H
02H
64H
65H
0H
1H
2H
3H
4H
:
*Disabled bit
Rev.1.0

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