ADT7473 Analog Devices, Inc., ADT7473 Datasheet - Page 25

• Manufacturer Part Number: ADT7473
• Description: Dbcool Remote Thermal Monitor And Fan Controller
• Manufacturer: Analog Devices, Inc.

Configuring the THERM Pin as Bidirectional
In addition to monitoring THERM as an input, the ADT7473
can optionally drive THERM low as an output. When
PROCHOT is bidirectional, THERM can be used to throttle th
processor by asserting
system-critical thermal limits. If the temperature exceeds a
thermal limit by 0.25°C, THERM asserts low. If the tempera
is still above the thermal limit on the next monitoring cycle,
THERM stays low. THERM remains asserted low until the
temperature is equal to or below the thermal limit. Beca
temperature for that channel is measured only once for every
monitoring cycle after
remain low for at least one monitoring cycle.
The THERM pin can be configured to assert low, if the
Remote 1, local, or Remote 2 THERM temperature limits are
exceeded by 0.25°C. The THERM temperature limit registers
are at Register 0x6A, Register 0x6B, and Register 0x6C,
respectively. Setting Bit 5, Bit 6, and Bit 7 of Configuration
Register 5 (0x7C) makes THERM bidirectional for the
Remote 1, local, and Remote 2 temperature channels,
respectively. Figure 31 shows how the THERM pin asserts low
as an output in the event of a critical over temperature.
(REGISTER 0x7A)
TIMER LIMIT
THERM
PROCHOT . The user can preprogram
THERM asserts, it is guaranteed to
728.32ms
364.16ms
182.08ms
91.04ms
45.52ms
22.76ms
2.914s
1.457s
Figure 30. Functional Block Diag
0
1
2
3
4
5
use the
6
7
CO
ture
Rev. A | Page 25 of 76
MPARATOR
ram of the AD
e
CLEAR
ON RE
7 6 5 4 3 2 1 0
IN
AD
An alternative method of disabling THERM is to progr
THERM
or −128°C or less in twos complem
THERM temperature limit values less than –63°C or –128°C,
respectively, THERM is disabled. THERM can also be disabled
by setting Bit 1 of Configuration Register 3 (0x78) to 0.
ED
T7473
LATCH
RESET
INTERRUPT MASK REGISTER 2
OUT
THERM Monitoring Circuitry
1 = MASK
F4P BIT (BIT 5)
INTERRUPT STATUS
REGISTER 2
(REGISTER 0x75)
THERM
temperatu
THERM LIMIT
THERM LIMIT
F4P BIT (BIT 5)
0.25°C
TEMP
Figure 31. Asserting THERM as an Output,
THERM TIMER CLEARED ON READ
2.914s
1.457s
728.32ms
364.16ms
182.08ms
91.04ms
45.52ms
22.76ms
Based on Tripping THERM Limits
re limit to –64°C or less in
(REGISTER 0x79)
MONITORING
THERM TIMER
CYCLE
ent mode; that is, for
SMBALERT
THERM
Offset 64 mode,
ADT7473
am
the