ADT7460 Analog Devices, Inc., ADT7460 Datasheet - Page 23

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ADT7460

Manufacturer Part Number
ADT7460
Description
Dbcool? Remote Thermal Controller And Fan Controller
Manufacturer
Analog Devices, Inc.
Datasheet

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Masking Interrupt Sources
Interrupt Mask Registers 1 and 2 are located at Addresses 0x74
and 0x75. These allow individual interrupt sources to be masked
out to prevent SMBALERT interrupts. Note that masking an
interrupt source prevents only the SMBALERT output from
being asserted; the appropriate status bit is set as normal.
Table 25. Interrupt Mask Register 1 (Reg. 0x74)
Bit
7
6
5
4
3
2
1
0
Table 26. Interrupt Mask Register 2 (Reg. 0x75)
Bit
7
6
5
4
3
2
1
0
HIGH LIMIT
TEMPERATURE
STATUS BIT
SMBALERT
“STICKY”
Figure 36. How Masking the Interrupt Source Affects SMBALERT Output
Mnemonic
OOL
R2T
LT
R1T
-
VCC
-
2.5 V
Mnemonic
D2
D1
FAN4
FAN3
FAN2
FAN1
OVT
-
Description
1 masks SMBALERT for any alert condition
flagged in Status Register 2.
1 masks SMBALERT for Remote 2
temperature.
1 masks SMBALERT for local temperature.
1 masks SMBALERT for Remote 1
temperature.
Unused
1 masks SMBALERT for the VCC channel.
Unused
1 masks SMBALERT for the 2.5 V channel.
Description
1 masks SMBALERT for Diode 2 errors.
1 masks SMBALERT for Diode 1 errors.
1 masks SMBALERT for Fan 4 failure. If
the TACH4 pin is being used as the
THERM input, this bit masks SMBALERT
for a THERM event.
1 masks SMBALERT for Fan 3.
1 masks SMBALERT for Fan 2.
1 masks SMBALERT for Fan 1.
1 masks SMBALERT for overtemperature
(exceeding THERM limits).
Unused
TEMP BACK IN LIMIT
(STATUS BIT STAYS SET)
INTERRUPT
MASK BIT SET
(TEMP BELOW LIMIT)
CLEARED ON READ
(SMBALERT REARMED)
INTERRUPT MASK BIT
CLEARED
Rev. C | Page 23 of 52
Enabling the SMBALERT Interrupt Output
The SMBALERT interrupt function is disabled by default. Pin 5
or Pin 14 can be reconfigured as an SMBALERT output to signal
out-of-limit conditions.
Table 27. Config Register 4 (Reg. 0x7D)
Pin No.
14
Table 28. Config Register 3 (Reg. 0x78)
Pin No.
5
To Assign THERM Functionality to Pin 9
Pin 9 can be configured as the THERM pin on the ADT7460.
To configure Pin 9 as the THERM pin, set the THERM ENABLE
Bit (Bit 1) in Configuration Reg er 3 (Address 0x78) = 1.
THERM
When configured as an input, the THERM pin allows the user
to time assertions on the pin. This can be us
to the PROCHOT output of a CPU to gauge system performance.
Fo more information on timing THERM assertions and
generating SMBALERT s based on THERM , see the Generating
Inter
The user can also set up the ADT7460 so when the THER
is dr ven low externally, the fans run at 100%.
100% while the THERM pin is pulled low.
T is
Regi
alr dy running, for example, in manual mod
cu ent duty cycle is above 0x00 or in automatic mode when the
te
the d ty cycle in manual mode is set to 0x00, pulling THERM
low externally has no effect. See Figure 37 for more information
h is done by setting the BOOST bit (Bit 2) in Configurat
mperature is above T
rr
r
ea
T
THERM
THERM ASSERTED TO LOW AS
AN INPUT. FANS DO NOT GO
TO 100% SINCE TEMPERATURE
IS BELOW T
i
ster 3 (Address 0x78) to 1.
MIN
rupts from Events section.
u
as an Input
MIN
Figure 37. Asserting THERM Low as an Input in
.
Bit Setting
<0> AL2.5V = 1
Bit Setting
<0> ALERT = 1
Automatic Fan Speed Control Mode
MIN
. If the temperature is below T
THERM ASSERTED TO LOW AS AN
INPUT. FANS GO TO 100% SINCE
TEMPERATURE IS ABOVE T
FANS ARE ALREADY RUNNING.
This works only if the fan is
ist
eful for connecting
e when the
The fans run at
MIN
AND
ADT7460
MIN
M
ion
or if
pin
.

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