ADT7460 Analog Devices, Inc., ADT7460 Datasheet - Page 24

• Manufacturer Part Number: ADT7460
• Description: Dbcool? Remote Thermal Controller And Fan Controller
• Manufacturer: Analog Devices, Inc.

ADT7460
THERM TIMER
The ADT7460 has an internal timer to measure THERM
assertion time. For example, the THERM input may be
connected to the PROCHOT output of a Pentium 4 CPU and
m
connected to the output of a trip point temperature sensor.
The timer is started on the assertion of the ADT7460’s THERM
input and stopped on the negation of the pin. The timer counts
THERM times cumulatively, therefore, the timer resumes
counting on the next THERM assertion. The THERM timer
continues to accumulate THERM assertion times until the
timer is read (it is cleared on read) or until it reaches full scale.
If the counter reaches full scale, it stops at that reading until
cleared.
The 8-bit THERM timer register (Reg. 0x79) is designed such
that Bit 0 is set to 1 on the first THERM assertion. Once the
cumulative THERM assertion time exceeds 45.52 ms, Bit 1 of
the THERM timer is set and Bit 0 becomes the LSB of the timer
with a resolution of 22.76 ms.
Figure 38 illustrates how the THERM timer behaves as the
THERM input is asserted and negated. Bit 0 is set on the first
THERM assertion detected. This bit remains set until the
cumulative THERM assertions exceed 45.52 ms. At this time,
Bit 1 of the THERM timer is set, and Bit 0 is cleared. Bit 0 now
reflects timer readings with a resolution of 22.76 ms.
easure system performance. The THERM
(REG. 0x79)
(REG. 0x79)
(REG. 0x79)
THERM
THERM
THERM
THERM
THERM
THERM
TIMER
TIMER
TIMER
ACCUMULATE THERM LOW
ACCUMULATE THERM LOW
Figure 38. Understanding the THERM
ASSERTION TIMES
ASSERTION TIMES
0 0 0
7 6 5
0 0 0
7 6 5
0 0 0
7 6 5
0
4
0
4
0
4
0 0 0 1
3 2 1 0
0 0 1 0
3 2 1 0
0 1 0 1
3 2 1 0
THERM ASSERTED ≥ 113.8ms
(91.04ms + 22.76ms)
THERM ASSERTED
THERM ASSERTED
≤ 22.76ms
≥ 45.52ms
input may also be
Timer
Rev. C | Page 24 of 52
When using the THERM timer, be aware of the following:
After a THERM timer read (Reg. 0x79)
•
•
If the THERM timer is read during a THERM assertion
•
•
•
•
Generating SMBALERT Interrupts from THERM Events
The ADT7460 can generate SMBALERT s when a programmable
THERM limit has been exceeded. This allows the systems
designer to ignore brief, infrequent THERM assertions while
capturing longer THERM events. Register 0x7A is the THERM
limit register. This 8-bit register allows a limit from 0 seconds
(first THERM assertion) to 5.825 seconds to be set before an
SMBALERT is generated. The THERM timer value is compared
with the contents of the THERM limit register. If the THERM
timer value exceeds the THERM limit value, the F4P bit (Bit 5)
of Status Register 2 is set an
that the F4P bit (Bit 5) of Mask Register 2 (Reg. 0x75) masks out
SMBALERT s if this bit is set to 1, although the F4P bit of
Interrupt Status Register 2 is still set if the THERM limit is
exceeded.
Figure 39 is a functional block diagram of the THERM timer,
limit, and associated circuitry. Writing 0x00 to the THERM
limit register (Reg. 0x7A) causes SMBALERT to be generated
on the first THERM assertion. A THERM limit of 0x01
generates an SMBALERT once cumulative THERM assertions
exceed 45.52 ms.
The contents of the timer is cleared on read.
The F4P bit (Bit 5) of Status Register 2 needs to be cleared
(assuming the THERM
The contents of the timer are cleared.
Bit 0 of the THERM timer is set to 1 (since a THERM
assertion is occurring).
The THERM timer increments from 0.
If the THERM limit (Reg. 0x7A) = 0x00, the F4P bit is set.
d an SMBALERT
limit has been exceeded).
is generated. Note