PIC16C782 Microchip Technology Inc., PIC16C782 Datasheet - Page 21
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PIC16C782
Manufacturer Part Number
PIC16C782
Description
8-bit Cmos Microcontrollers With A/d, D/a, Opamp, Comparators And Psmc
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C782.pdf
(186 pages)
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2.5
The INTCON register is a readable and writable regis-
ter which contains:
• Enable and interrupt flag bits for TMR0 register
• Enable and interrupt flag bits for the external
• Enable and interrupt flag bits for PORTB
• Peripheral interrupt enable bit
• Global interrupt enable bit
REGISTER 2-3:
overflow
interrupt (INT)
Interrupt-on-Change (IOCB)
2001 Microchip Technology Inc.
INTCON Register
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTERRUPT CONTROL REGISTER (INTCON: 0Bh, 8Bh, 10Bh, 18Bh)
Legend:
R = Readable bit
- n = Value at POR
bit 7
GIE: Global Interrupt Enable bit
1 = Enables all unmasked interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE: RB0/INT External Interrupt Enable bit
1 = Enables the RB0/INT external interrupt
0 = Disables the RB0/INT external interrupt
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
T0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF: RB0/INT External Interrupt Flag bit
1 = The RB0/INT external interrupt occurred (must be cleared in software)
0 = The RB0/INT external interrupt did not occur
RBIF: RB Port Change Interrupt Flag bit
1 = When at least one of the RB7:RB0 pins changed state (must be cleared in software)
0 = None of the RB7:RB0 pins have changed state
Note 1: Individual RB pin interrupt-on-change can be enabled/disabled from the Interrupt-
R/W-0
GIE
on-Change PORTB register (IOCB).
R/W-0
PEIE
R/W-0
T01E
Preliminary
W = Writable bit
’1’ = Bit is set
R/W-0
INTE
(1)
Note:
(1)
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit, or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
RBIE
PIC16C781/782
R/W-0
T0IF
x = Bit is unknown
R/W-0
INTF
DS41171A-page 19
R/W-x
RBIF
bit 0
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