PIC16C782 Microchip Technology Inc., PIC16C782 Datasheet - Page 53
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PIC16C782
Manufacturer Part Number
PIC16C782
Description
8-bit Cmos Microcontrollers With A/d, D/a, Opamp, Comparators And Psmc
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C782.pdf
(186 pages)
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5.0
The Timer0 module timer/counter has the following
features:
• 8-bit timer/counter
• Readable and writable
• Internal or external clock select
• Edge select for external clock
• 8-bit software programmable prescaler
• Interrupt on overflow from FFh to 00h
Figure 5-1 is a simplified block diagram of the Timer0
module.
Additional information on timer modules is available in
the
(DS33023).
5.1
Timer0 can operate as either a timer or a counter.
Programming Timer0 is via the OPTION register (see
Register 2-2).
Timer0 mode is selected by clearing/setting the bit
T0CS (OPTION_REG<5>). In Timer mode (T0CS = 0),
the Timer0 module increments every instruction cycle
(without prescaler). If the TMR0 register is written, the
increment is inhibited for the following two instruction
cycles. The user can work around this by writing an
adjusted value to the TMR0 register.
Counter mode is selected by setting bit T0CS
(OPTION_REG<5>).
increments either on every rising, or falling edge of pin
RA4/T0CKI. The incrementing edge is determined by
the
(OPTION_REG<4>). Clearing bit T0SE selects the ris-
ing edge, setting selects the falling edge. Restrictions
on the external clock input are discussed below.
FIGURE 5-1:
2001 Microchip Technology Inc.
RA4/T0CKI
pin
Note 1: T0CS, T0SE, PSA, PS<2:0> (OPTION_REG<5:0>).
PICmicro™
Timer0
TIMER0 MODULE
Timer0 Operation
2: The prescaler is shared with Watchdog Timer (refer to Figure 5-2 for detailed block diagram).
T0SE
Source
F
OSC
Mid-Range
TIMER0 BLOCK DIAGRAM
/4
In
Edge
Counter
T0CS
Reference
0
1
Select
mode,
Programmable
bit
PS<2:0>
Prescaler
Manual,
Timer0
T0SE
3
Preliminary
PSA
1
0
PSOUT
When an external clock input is used for Timer0, it must
meet certain requirements. The requirements ensure
the external clock can be synchronized with the internal
system clock. Also, there is a delay in the actual incre-
menting of Timer0 after synchronization.
Additional information on external clock requirements
is available in the PICmicro™ Mid-Range Reference
Manual, (DS33023).
EXAMPLE 5-1:
;* This code block will configure Timer0
;* for Polling, internal clock & 1:16
;*
;*
;* Wait for TMR0 overflow code included
********************************************
;*
;*
T0_OVFL_WAIT
prescaler
BANKSEL
CLRF
BANKSEL
MOVLW
MOVWF
Wait for TMR0 overflow
TBFSS
GOTO
BCF
(2 T
Sync with
Internal
Clocks
CY
Delay)
PIC16C781/782
TMR0
TMR0
OPTION_REG
B’11000011’
OPTION_REG
INTCON,T0IF
T0_OVFL_WAIT ; If clear, test
INTCON,T0IF
PSOUT
INITIALIZING TIMER0
Data Bus
TMR0
; Select Bank 0
; Clear Timer0
; Register
; Select Bank 1
; INT on L2H
; Internal clk,
; pscaler 1:16
; Check for TMR0
; overflow
; again
; Clear interrupt
8
DS41171A-page 51
Flag bit T0IF
Set Interrupt
on Overflow
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