PIC16C782 Microchip Technology Inc., PIC16C782 Datasheet - Page 94
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PIC16C782
Manufacturer Part Number
PIC16C782
Description
8-bit Cmos Microcontrollers With A/d, D/a, Opamp, Comparators And Psmc
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C782.pdf
(186 pages)
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PIC16C781/782
12.1.2
The CM2CON0 register is a functional copy of the
CM1CON0 register described in Section 12.1.1. A sec-
ond control register, CM2CON1, is also present for
control of an additional synchronizing feature, as well
as mirrors of both comparator outputs.
12.1.2.1
The CM2CON0 register, shown in Register 12-2, con-
tains the control and status bits for Comparator C2.
Setting C2ON (CM2CON0<7>) enables Comparator
C2 for operation.
Bits C2CH<1:0> (CM2CON0<1:0>) select the compar-
ator input from the four analog pins, AN<7:4>.
C2R (CM2CON0<2>) selects the reference to be used
with the comparator. Setting C2R (CM2CON0<2>)
selects the output of the DAC module as the reference
for the comparator. Clearing C2R selects the V
input on the RA2/AN2/V
DS41171A-page 92
Note 1: To use AN<7:4> as analog inputs, the
COMPARATOR C2 CONTROL
REGISTERS
appropriate bits must be programmed in
the ANSEL register.
Control Register CM2CON0
REF
2 pin.
REF
Preliminary
2
The output of the comparator is available internally via
the C2OUT bit (CM2CON0<6>). To make the output
available for an external connection, the C2OE bit
(CM2CON0<5>) must be set.
The comparator output, C2OUT, can be inverted by
setting the C2POL bit (CM2CON0<4>). Clearing
C2POL results in a non-inverted output. A complete
table showing the output state versus input conditions
and the polarity bit is shown in Table 12-3.
C2SP (CM2CON0<3>) configures the speed of the
comparator. When C2SP is set, the comparator oper-
ates at its normal speed. Clearing C2SP operates the
comparator in low power mode.
Note 1: The internal output of the comparator is
2: The C2 interrupt will operate correctly
3: For C2 output on RB7/C2/PSMC1B/T1G:
latched at the end of each instruction
cycle. External outputs are not latched.
with C2OE set or cleared. An external
output is not required for the C2 interrupt.
(C2OE=1) & (C2ON=1) & (TRISB<7>=0)
& ((SMCON=0) or ((SMCOM=0) &
(SCEN=0))).
2001 Microchip Technology Inc.
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