PIC16F616 Microchip Technology Inc., PIC16F616 Datasheet - Page 121
PIC16F616
Manufacturer Part Number
PIC16F616
Description
14-pin Flash-based, 8-bit Cmos Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F616.pdf
(180 pages)
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12.6
The Watchdog Timer is a free running, on-chip RC
oscillator, which requires no external components. This
RC oscillator is separate from the external RC oscillator
of the CLKIN pin and INTOSC. That means that the
WDT will run, even if the clock on the OSC1 and OSC2
pins of the device has been stopped (for example, by
execution of a SLEEP instruction). During normal oper-
ation, a WDT time out generates a device Reset. If the
device is in Sleep mode, a WDT time out causes the
device to wake-up and continue with normal operation.
The WDT can be permanently disabled by program-
ming
(Section 12.1 “Configuration Bits”).
FIGURE 12-2:
TABLE 12-7:
© 2007 Microchip Technology Inc.
WDTE = 0
CLRWDT Command
Exit Sleep + System Clock = EXTRC, INTRC, EC
Exit Sleep + System Clock = XT, HS, LP
T0CKI
pin
(= F
CLKOUT
the
Note 1: T0SE, T0CS, PSA, PS<2:0> are bits in the OPTION register.
OSC
T0SE
Watchdog Timer (WDT)
/4)
Configuration
WDT STATUS
Watchdog
WDTE
Timer
WATCHDOG TIMER BLOCK DIAGRAM
T0CS
0
1
bit,
WDTE,
Conditions
PSA
0
1
PIC16F610/616/16HV610/616
as
Prescaler
clear
8-bit
Preliminary
8
PS<2:0>
12.6.1
The WDT has a nominal time-out period of 18 ms (with
no prescaler). The time-out periods vary with
temperature, V
part (see Table 15-4, Parameter 31). If longer time-out
periods are desired, a prescaler with a division ratio of
up to 1:128 can be assigned to the WDT under
software control by writing to the OPTION register.
Thus, time-out periods up to 2.3 seconds can be
realized.
The CLRWDT and SLEEP instructions clear the WDT
and the prescaler, if assigned to the WDT, and prevent
it from timing out and generating a device Reset.
The TO bit in the STATUS register will be cleared upon
a Watchdog Timer time out.
12.6.2
It should also be taken in account that under worst-
case conditions (i.e., V
Max. WDT prescaler) it may take several seconds
before a WDT time out occurs.
3
WDT PERIOD
WDT PROGRAMMING
CONSIDERATIONS
PSA
PSA
1
0
1
0
DD
and process variations from part to
SYNC 2
Time-Out
Cycles
DD
WDT
Cleared until the end of OST
= Min., Temperature = Max.,
Cleared
WDT
DS41288C-page 119
Data Bus
Set Flag bit T0IF
8
TMR0
on Overflow