EVX8AQ160TPY ETC-unknow, EVX8AQ160TPY Datasheet - Page 68
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EVX8AQ160TPY
Manufacturer Part Number
EVX8AQ160TPY
Description
Adc Quad 1.25gsps 8-bit Lvds 380-pin Ebga
Manufacturer
ETC-unknow
Datasheet
1.EVX8AQ160TPY.pdf
(82 pages)
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8.8
Table 8-51.
Note:
68
INL Code
0
16
32
48
64
80
96
112
128
144
160
176
192
208
224
240
255
EV8AQ160
INL Calibration Procedure
The INL correction value varies with the temperature. The typical value is 0.15 LSB at T
0.2 LSB from low to high temperatures.
0846G–BDC–11/09
INL Calibration Table
The calibration of the INL abides by the following rule:
If there is an INL peak (+0.5 LSB) around a specific code, then this peak can be decreased by 0.15 LSB
by writing a “1” on the bit given by the table below for the first level of correction (fifth column). If this is
not sufficient to decrease the INL peak, then you can write a “1” on the bit given by the table in the first
level INL column (fourth column). The effect will be then to decrease the INL by 0.6 LSB (the effect of
columns four and five are added).
The procedure is similar when the INL should be increased (columns one and two).
Example:
The intrinsic INL obtained with the ADC has a peak (+0.5 LSB) around code 128. By writing a “1” on bit 9
of register at address 0x34, you will be able to decrease the INL peak. If this is not sufficient, you can
write another “1” on bit 9 at address 0x31.
First Level INL
Increase by 0.45 LSB
0x32 bit 8
0x32 bit 10
0x32 bit 12
0x32 bit 14
0x31 bit 0
0x31 bit 2
0x31 bit 4
0x31 bit 6
0x31 bit 8
0x31 bit 10
0x31 bit 12
0x31 bit 14
0x30 bit 0
0x30 bit 2
0x30 bit 4
0x30 bit 6
0x30 bit 8
Second Level INL
Increase by 0.15 LSB
0x35 bit 8
0x35 bit 10
0x35 bit 12
0x35 bit 14
0x34 bit 0
0x34 bit 2
0x34 bit 4
0x34 bit 6
0x34 bit 8
0x34 bit 10
0x34 bit 12
0x34 bit 14
0x33 bit 0
0x33 bit 2
0x33 bit 4
0x33 bit 6
0x33 bit 8
First Level INL
Decrease by 0.45 LSB
0x32 bit 9
0x32 bit 11
0x32 bit 13
0x32 bit 15
0x31 bit 1
0x31 bit 3
0x31 bit 5
0x31 bit 7
0x31 bit 9
0x31 bit 11
0x31 bit 13
0x31 bit 15
0x30 bit 1
0x30 bit 3
0x30 bit 5
0x30 bit 7
0x30 bit 9
J
= 50°C but can vary from 0.1 LSB to
e2v semiconductors SAS 2009
Second Level INL
Decrease by 0.15 LSB
0x35 bit 9
0x35 bit 11
0x35 bit 13
0x35 bit 15
0x34 bit 1
0x34 bit 3
0x34 bit 5
0x34 bit 7
0x34 bit 9
0x34 bit 11
0x34 bit 13
0x34 bit 15
0x33 bit 1
0x33 bit 3
0x33 bit 5
0x33 bit 7
0x33 bit 9
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