DSPIC33FJ12MC202 Microchip Technology Inc., DSPIC33FJ12MC202 Datasheet - Page 195

• Manufacturer Part Number: DSPIC33FJ12MC202
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

18.2
1.
2.
3.
4.
A transmit interrupt will be generated as per the inter-
rupt control bits, UTXISEL<1:0>.
18.3
1.
2.
3.
4.
5.
A transmit interrupt will be generated as per the setting
of control bits, UTXISEL<1:0>.
18.4
The following sequence will send a message frame
header made up of a Break, followed by an auto-baud
Sync byte.
1.
2.
3.
4.
The Sync character now transmits.
© 2007 Microchip Technology Inc.
Set up the UART:
a)
b)
c)
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write data byte to lower byte of UxTXREG word.
The value will be immediately transferred to the
Transmit Shift Register (TSR) and the serial bit
stream will start shifting out with the next rising
edge of the baud clock.
Alternately, the data byte can be transferred
while UTXEN = 0, and then the user application
can set UTXEN. This causes the serial bit
stream to begin immediately, because the baud
clock starts from a cleared state.
Set up the UART (as described in Section 18.2
“Transmitting in 8-bit Data Mode”).
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write UxTXREG as a 16-bit value only.
A word write to UxTXREG triggers the transfer
of the 9-bit data to the TSR. The serial bit stream
will start shifting out with the first rising edge of
the baud clock.
Configure the UART for the desired mode.
Set UTXEN and UTXBRK, which sets up the
Break character.
Load the UxTXREG register with a dummy
character to initiate transmission (value is
ignored).
Write 0x55 to UxTXREG, which loads the Sync
character into the transmit FIFO. After the Break
has been sent, the UTXBRK bit is reset by
hardware.
Transmitting in 8-bit Data Mode
Write appropriate values for data, parity and
Stop bits.
Write appropriate baud rate value to the
BRGx register.
Set up transmit and receive interrupt enable
and priority bits.
Transmitting in 9-bit Data Mode
Break and Sync Transmit
Sequence
Preliminary
dsPIC33FJ12MC201/202
18.5
1.
2.
3.
4.
The act of reading the UxRXREG character will move
the next character to the top of the receive FIFO,
including a new set of PERR and FERR values.
18.6
UARTx Clear to Send (UxCTS) and Request to Send
(UxRTS) are the two hardware controlled active-low
pins associated with the UART module. The UEN<1:0>
bits in the UxMODE register configures these pins.
These two pins allow the UART to operate in Simplex
and Flow Control modes. They are implemented to
control the transmission and the reception between the
Data Terminal Equipment (DTE).
18.7
The UART module provides two types of infrared UART
support:
• IrDA clock output to support external IrDA
• Full implementation of the IrDA encoder and
18.7.1
To support external IrDA encoder and decoder devices,
the BCLK pin (same as the UxRTS pin) can be
configured to generate the 16x baud clock. With
UEN<1:0> = 11, the BCLK pin will output the 16x baud
clock if the UART module is enabled. The pin can be
used to support the IrDA codec chip.
18.7.2
The UART module includes full implementation of the
IrDA encoder and decoder. The built-in IrDA encoder
and decoder functionality is enabled using the IREN bit
(UxMODE<12>). When enabled (IREN = 1), the
receive pin (UxRX) acts as the input from the infrared
receiver. The transmit pin (UxTX) acts as the output to
the infrared transmitter.
encoder and decoder device (legacy module
support)
decoder.
Set up the UART (as described in Section 18.2
“Transmitting in 8-bit Data Mode”).
Enable the UART.
A receive interrupt will be generated when one
or more data characters have been received as
per interrupt control bits, URXISEL<1:0>.
Read the OERR bit to determine if an overrun
error has occurred. The OERR bit must be reset
in software.
Read UxRXREG.
Receiving in 8-bit or 9-bit Data
Mode
Flow Control Using UxCTS and
UxRTS Pins
Infrared Support
EXTERNAL IrDA SUPPORT – IrDA
CLOCK OUTPUT
BUILT-IN IrDA ENCODER AND
DECODER
DS70265B-page 193