DSPIC30F4013 Microchip Technology Inc., DSPIC30F4013 Datasheet - Page 213

• Manufacturer Part Number: DSPIC30F4013
• Description: Dspic30f3014/4013 High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

I
I/O Pin Specifications
I/O Ports .............................................................................. 51
I
I
I
I
I
I
Idle Current (I
In-Circuit Serial Programming (ICSP) ......................... 41, 135
Input Capture (CAPX) Timing Characteristics .................. 183
Input Capture Module ......................................................... 77
Input Capture Operation During Sleep and Idle Modes ...... 78
Input Capture Timing Requirements ................................. 183
Input Change Notification Module ....................................... 54
Instruction Addressing Modes............................................. 35
© 2007 Microchip Technology Inc.
2
2
2
2
2
2
C 10-bit Slave Mode Operation ........................................ 87
C 7-bit Slave Mode Operation .......................................... 87
C Master Mode Operation ................................................ 89
C Master Mode Support ................................................... 89
C Module .......................................................................... 85
S Mode Operation .......................................................... 123
Input .......................................................................... 171
Output ....................................................................... 171
Parallel (PIO) .............................................................. 51
Reception.................................................................... 88
Transmission............................................................... 87
Reception.................................................................... 87
Transmission............................................................... 87
Baud Rate Generator.................................................. 90
Clock Arbitration.......................................................... 90
Multi-Master Communication, Bus Collision and
Reception.................................................................... 90
Transmission............................................................... 89
Addresses ................................................................... 87
Bus Data Timing Characteristics
Bus Data Timing Requirements
Bus Start/Stop Bits Timing Characteristics
General Call Address Support .................................... 89
Interrupts..................................................................... 89
IPMI Support ............................................................... 89
Operating Function Description .................................. 85
Operation During CPU Sleep and Idle Modes ............ 90
Pin Configuration ........................................................ 85
Programmer’s Model................................................... 85
Register Map............................................................... 91
Registers..................................................................... 85
Slope Control .............................................................. 89
Software Controlled Clock Stretching (STREN = 1).... 88
Various Modes ............................................................ 85
Data Justification....................................................... 123
Frame and Data Word Length Selection................... 123
Interrupts..................................................................... 78
Register Map............................................................... 79
CPU Idle Mode............................................................ 78
CPU Sleep Mode ........................................................ 78
dsPIC30F3014 Register Map (Bits 15-8) .................... 54
dsPIC30F3014 Register Map (Bits 7-0) ...................... 54
dsPIC30F4013 Register Map (Bits 15-8) .................... 54
dsPIC30F4013 Register Map (Bits 7-0) ...................... 54
File Register Instructions ............................................ 35
Fundamental Modes Supported.................................. 35
MAC Instructions......................................................... 36
Bus Arbitration .................................................... 90
Master Mode ..................................................... 194
Slave Mode ....................................................... 196
Master Mode ..................................................... 194
Slave Mode ....................................................... 197
Master Mode ..................................................... 194
Slave Mode ....................................................... 196
IDLE
) ............................................................ 168
Instruction Set
Internal Clock Timing Examples ....................................... 176
Internet Address ............................................................... 215
Interrupt Controller
Interrupt Priority .................................................................. 56
Interrupt Sequence ............................................................. 59
Interrupts ............................................................................ 55
L
Load Conditions................................................................ 174
Low-Voltage Detect (LVD) ................................................ 149
Low-Voltage Detect Characteristics.................................. 171
LVDL Characteristics ........................................................ 172
M
Memory Organization ......................................................... 23
Microchip Internet Web Site.............................................. 215
Modes of Operation
Modulo Addressing ............................................................. 36
MPLAB ASM30 Assembler, Linker, Librarian ................... 162
MPLAB ICD 2 In-Circuit Debugger ................................... 163
MPLAB ICE 2000 High-Performance Universal
MPLAB ICE 4000 High-Performance Universal
MPLAB Integrated Development Environment Software.. 161
MPLAB PM3 Device Programmer .................................... 163
MPLINK Object Linker/MPLIB Object Librarian ................ 162
N
NVM
O
OC/PWM Module Timing Characteristics ......................... 184
Operating Current (I
Operating Frequency vs Voltage
Oscillator
dsPIC30F3014/4013
MCU Instructions ........................................................ 35
Move and Accumulator Instructions ........................... 36
Other Instructions ....................................................... 36
Overview................................................................... 156
Summary .................................................................. 153
Register Map .............................................................. 62
Traps .......................................................................... 58
Interrupt Stack Frame................................................. 59
Core Register Map ..................................................... 32
Disable...................................................................... 107
Initialization............................................................... 107
Listen All Messages.................................................. 107
Listen Only................................................................ 107
Loopback .................................................................. 107
Normal Operation ..................................................... 107
Applicability................................................................. 38
Incrementing Buffer Operation Example .................... 37
Start and End Address ............................................... 37
W Address Register Selection.................................... 37
In-Circuit Emulator.................................................... 163
In-Circuit Emulator.................................................... 163
Register Map .............................................................. 45
dsPIC30FXXXX-20 (Extended) ................................ 165
Configurations .......................................................... 138
Fail-Safe Clock Monitor .................................... 140
Fast RC (FRC).................................................. 139
Initial Clock Source Selection ........................... 138
Low-Power RC (LPRC) .................................... 139
LP Oscillator Control......................................... 139
Phase Locked Loop (PLL) ................................ 139
Start-up Timer (OST)........................................ 138
DD
) .................................................... 167
DS70138E-page 211