NSD-2101 austriamicrosystems, NSD-2101 Datasheet - Page 13

• Manufacturer Part Number: NSD-2101
• Description: Piezo Motor Driver Asic For Sql-rv Series Reduced Voltage Squiggle Rv And Utaf? Motors
• Manufacturer: austriamicrosystems

NSD-2101
Preliminary Data Sheet - D e t a i l e d D e s c r i p t i o n
Table 14. Period Offset Register Values
Idle mode reduces power consumption while preserving the most recent frequency calibration. To further reduce power, the XPD pin must be
pulled to ground.
7.12 Hybrid Speed Register
The hybrid speed register allows the average voltage as seen by the motor to be set from VDD to 2 x VDD. This provides a power efficient
method of reducing the speed of the motor. The value of the register can vary from 0 (half bridge) to 128 (full bridge). The average voltage can
be calculated in the following manner.
Where: VDD is the supply voltage
Table 15. Hybrid Speed Register Values
www.austriamicrosystems.com/NSD-2101
Hybrid Speed Register
Period Offset Register
1000 0000
0100 0000
0010 0000
0001 0000
0000 0000
0010 0000
1000 0000
0000 0111
0110 0000
VAVG = VDD + (RegisterValue * VDD / 128)
-5.6
Typ
Typ
100
25
75
0
0
0
0
0
Revision 0.2
Unit
Unit
%
%
%
%
%
%
%
%
%
Hybrid speed control enabled
Increased dead time enabled
Half bridge mode enabled
VDD + VDD (full bridge)
Maximum period offset
VDD + 0.25 * VDD
VDD + 0.75 * VDD
Idle mode enabled
VDD (half bridge)
Conditions
Conditions
(EQ 2)
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