EM65565A ELAN Microelectronics Corp, EM65565A Datasheet - Page 20
EM65565A
Manufacturer Part Number
EM65565A
Description
65 Com/ 132 Seg Stn Lcd Driver
Manufacturer
ELAN Microelectronics Corp
Datasheet
1.EM65565A.pdf
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EM65565A
65 COM/132SEG STN LCD Driver
14 x
Internal
Internal
Timing
Timing
MPU
MPU
Holder
Address
Address
Column
DATA
DATA
Holder
Preset
Signal
/WR
BUS
/WR
/WR
Read
BUS
6.1.5 Page Address Circuit
The page address of the DDRAM is specified through the Page Address Set
Command. The page address must be specified again when changing pages to
perform access. Page address 8 is the page for the RAM region used only by the static
indicators, and only the display data D0 is used.
6.1.6 Line Address Circuit
The line address circuit specifies the line address corresponding to the common output
when the DDRAM contents are displayed. Using the display start line address set
command, the normally the top line of the display can be specified (which is the COM0
output when the common output mode is normal, and the COM63 output for the
EM65565A when the common output mode is reversed. The display area is a 65 lines
area for the EM65565A from the display start line address.
If the line address is changed dynamically using the display start line address set
command, screen scrolling, page swapping, etc. can be performed.
RD
Address Set
N
N
#n
Latch
N
N
Fig. 3 DDRAM Read Sequence
Dummy
N+1
N+1
Read
(This specification is subject to change without further notice)
N+1
Increment N+1
n
Data Read
Product Specification (V1.0) 06.06.2005
N+2
N+2
#n
N+2
n+1
N+2
Data Read
N+3
N+3
#n+1
N+3
n+2
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