EM65565A ELAN Microelectronics Corp, EM65565A Datasheet - Page 23

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EM65565A

Manufacturer Part Number
EM65565A
Description
65 Com/ 132 Seg Stn Lcd Driver
Manufacturer
ELAN Microelectronics Corp
Datasheet
Product Specification (V1.0) 06.06.2005
(This specification is subject to change without further notice)
6.1.10 Oscillator Circuit
This is an RC-type oscillator that produces the display clock. The oscillator circuit is
only enabled when M/S=”H” and DCLKS=”H”. When DCLKS=”L” the oscillation stops,
and the display clock is input through the DCLK terminal.
6.1.11 Display Timing Generator Circuit
The display timing generator circuit generates the timing signal to the line address
circuit and the display data latch circuit using the display clock. The display data is
latched into the display data latch circuit synchronized with the display clock, and is
output to the data driver output terminal. Reading from the display data liquid crystal
driver circuits is completely independent of accesses to the DDRAM by the MPU.
Consequently, even if the DDRAM is accessed asynchronously during a Liquid Crystal
Display, there is absolutely no adverse effect (such as flickering) on the display.
Moreover, the display timing generator circuit generates the common timing and the
liquid crystal alternating current signal (FR) from the display clock. It generates a drive
wave from using a two-frame alternating current drive method, as shown in Figure 6, for
the liquid crystal drive circuit.
When several EM65565A ICs are used, the slave ICs must be supplied with display
timing signals (FR, DCLK, /BCT) from the master ICs. Operating mode descriptions
are shown in the following table:
Note: O : Output
Master (M/S = “H”)
Slave (M/S = “L”)
When the EM65565A is used for the master/slave configuration, each of the DCLKS
pins is set to the same level together.
Fig. 6 Drive wave from a two-frame AC drive method
COM0
COM1
DATA
SEGn
RAM
FR
CL
DCLK
64 65 1
Internal oscillator circuit is enabled (DCLKS=”H”)
Internal oscillator circuit is disabled (DCLKS=”L”)
Internal oscillator circuit is enabled (DCLKS=”H”)
Internal oscillator circuit is disabled (DCLKS=”L”)
I : Input
Operating Mode
2
3
4
63 64 65 1
NOTE
2
65 COM/132SEG STN LCD Driver
3
V0
V1
V4
Vss
V0
V1
V4
Vss
V0
V2
V3
Vss
FR
O
O
I
I
EM65565A
DCLK /BCT
O
I
I
I
O
O
x 17
I
I

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