STW4811M STMicroelectronics, STW4811M Datasheet - Page 30
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STW4811M
Manufacturer Part Number
STW4811M
Description
Power Management For Multimedia Processors
Manufacturer
STMicroelectronics
Datasheet
1.STW4811M.pdf
(87 pages)
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Functional description
30/87
Registers controlled by main I2C BUS
I2C controlled registers are controlled through the main serial I2C interface, SCL and SDA
balls.
Configuration 1 register
Table 18.
1. These bits are reset (0) after reading
1. In STw4811M, pdn_vaux = 0 is the default. In STw4811N, pdn_vaux = 1 is the default.
In Flash OTP two registers allow to program STw4811 energy management part.
These two registers are at addresses 1E and 1F and must be programmed with 1F register
first followed by 1E register.
[3:1] vmmc_sel[2:0]
Bits
pdn_vaux
7
6
5
4
0
R/W
7
pdn_vaux
it_warn
monitoring_vio_
vmem_vcore
mmc_ls_status
pdn_vmmc
Name
Configuration 1 register (11h)
it_warn
R
6
(1)
monitoring_vio_
vmem_vcore
Value
000
001
010
011
100
101
110
111
0
1
0
1
0
1
0
1
0
1
R
5
Inactive
Enable LDO vaux
Below temperature threshold
Above temperature threshold
Outputs in the good range
Outputs lower than expected on vio_vmem or vcore
Level shifters ON, if ‘pdn_vmmc’ or
‘external_vmmc’ = 1
Level shifters High Impedance, if ‘pdn_vmmc’ or
‘external_vmmc’ =1
1.8V selection
1.8V selection
2.85V selection
3V selection
1.85 V selection
2.6 V selection
2.7 V selection
3.3 V selection
Inactive
Enable SD/MMC/SDIO function.
(1)
mmc_ls_
status
R/W
4
Settings
3
vmmc_sel[2:0]
R/W
2
STw4811M/STw4811N
1
vmmc
pdn_
Default
R/W
0
000
0
0
0
0
0
(1)