BU8255KVT ROHM Co. Ltd., BU8255KVT Datasheet - Page 5

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BU8255KVT

Manufacturer Part Number
BU8255KVT
Description
35bit Lvds Receiver 5 35 Deserializer
Manufacturer
ROHM Co. Ltd.
Datasheet

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●Pin Description
Table .1: Pin description
RA6~RA0
RB6~RB0
RC6~RC0
RD6~RD0
RE6~RE0
RC+, RC-
RESERVE
Pin Name
RA+, RA-
RB+, RB-
RD+, RD-
RE+, RE-
CLKOUT
RCLK+,
RCLK-
PGND
LGND
PVDD
LVDD
VDD
GND
R/F
OE
PD
6,7,8,10,11,1
40,41,42,43,
32,33,34,35,
22,24,25,26,
14,15,17,18,
9,23,37,48
1,16,30,44
45,46,47
36,38,39
27,28,29
19,20,21
Pin No.
50,49
52,51
57,56
55,54
60,59
62,61
2,13
53
58
64
63
31
3
4
5
2
LVDS Input
LVDS Input
LVDS Input
LVDS Input
LVDS Input
LVDS Input
Ground
Ground
Ground
Output
Output
Output
Output
Output
Output
Power
Power
Power
Input
Input
Input
Input
I/O
LVDS data input
LVDS clock input
LVCMOS data outputs.
Reserved input, must be “Low” for normal operation.
Power down input for the internal system.
H: Normal operation.
L: Power down (All output are “Low”).
Power down input for the data output driver.
H: Output enable (Normal operation).
L: Output disable(All outputs are “Hi-Z”).
Select input pin for data output clock triggering edge.
H: Output data is latched on rising edge.
L: Output data is latched on falling edge.
3.3V output driver and digital core power supply pin.
LVCMOS level clock output.
GND pin for both data output driver cells and the digital
cores.
Power supply pin for LVDS inputs.
Ground pin for LVDS inputs.
Power supply pin for PLL core.
Ground pin for PLL core.
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+ : Positive input of LVDS data differential pair.
- : Negative input of LVDS data differential pair.
Description

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