ADN2530 Analog Devices, Inc., ADN2530 Datasheet - Page 12

• Manufacturer Part Number: ADN2530
• Description: 11.3 Gbps, Active Back-termination, Differential Vcsel Driver
• Manufacturer: Analog Devices, Inc.

ADN2530
This provides excellent transmission line termination while
dissipating less power than a traditional resistor passive back-
termination. No portion of the modulation current flows in the
active back-termination resistance. All of the preset modulation
current IMOD, the range specified in Table 1, flows in the
external load. The equivalent circuits for MSET, IMODP, and
IMODN are shown in Figure 31 and Figure 32. The two 50 Ω
resistors in Figure 32 are not real resistors. They represent the
active back-termination resistance.
The recommended configuration of the MSET, IMODP, and
IMODN pins is shown in Figure 33. See Table 6 for recom-
mended components. When the voltage on DATAP is greater
than the voltage on DATAN, the modulation current flows into
the IMODP pin and out of the IMODN pin, generating an
optical Logic 1 level at the TOSA output when the TOSA is
connected as shown in Figure 33.
The ratio between the voltage applied to the MSET pin and the
differential modulation current available at the IMODP and
IMODN pins is a function of the load resistance value, as shown
in Figure 34.
VMSET
Figure 32. Equivalent Circuit of the IMODP and IMODN Pins
Figure 33. Recommended Configuration for the
Figure 31. Equivalent Circuit of the MSET Pin
MSET
MSET
VCC
ADN2530
50Ω
MSET, IMODP, and IMODN Pins
GND
IMODN
IMODN
IMODP
VCC
IBIAS
15Ω
800Ω
200Ω
Z
Z
0
0
15Ω
= 50Ω
= 50Ω
IMODP
VCC
VCC
VCC
L
L
50Ω
C
C
VCC
L
VCC
L
Z
Z
0
0
= 50Ω
= 50Ω
TOSA
Rev. A | Page 12 of 20
Using the resistance of the TOSA, the user can calculate the
voltage range that should be applied to the MSET pin to
generate the required modulation current range (see the
example in the Applications Information section).
The circuit used to drive the MSET voltage must be able to
drive the 1 kΩ resistance of the MSET pin. To be able to drive
23 mA modulation currents through the differential load, the
output stage of the ADN2530 (IMODP and IMODN pins)
must be ac-coupled to the load. The voltages at these pins
have a dc component equal to VCC and an ac component with
single-ended peak-to-peak amplitude of IMOD × 50 Ω. This
is the case when the load impedance (R
100 Ω differential because the transmission line characteristic
impedance sets the peak-to-peak amplitude. For the case where
R
amplitude is IMOD × R
output stage, the voltages at the IMODP and IMODN pins must
be between the compliance voltage specifications for this pin
over supply, temperature, and modulation current range, as
shown in Figure 35. See the Headroom Calculations section for
examples of headroom calculations.
TOSA
Figure 35. Allowable Range for the Voltage at IMODP and IMODN
is greater than 100 Ω, the single-ended, peak-to-peak
45
40
35
30
25
20
15
10
Figure 34. MSET Voltage to Modulation Current Ratio vs.
VCC + 0.7V
VCC – 0.7V
10
20
VCC
MIN
30
V
Differential Load Resistance
IMODP,
40
DIFFERENTIAL LOAD RESISTANCE
TYP
TOSA
50
V
MAX
IMODN
60
÷ 2. For proper operation of the
NORMAL OPERATION REGION
70
80
90
TOSA
100
) is less than
110
120
130
140