ADN2530 Analog Devices, Inc., ADN2530 Datasheet - Page 16

• Manufacturer Part Number: ADN2530
• Description: 11.3 Gbps, Active Back-termination, Differential Vcsel Driver
• Manufacturer: Analog Devices, Inc.

ADN2530
DESIGN EXAMPLE
This design example covers:
•
•
•
This design example assumes that the impedance of the
TOSA is 60 Ω, the forward voltage of the VCSEL at low current
is V
Headroom Calculations
To ensure proper device operation, the voltages on the IBIAS,
IMODP, and IMODN pins must meet the compliance voltage
specifications in Table 1.
Considering the typical application circuit shown in Figure 39,
the voltage at the IBIAS pin can be written as
where:
VCC is the supply voltage.
V
R
V
For proper operation, the minimum voltage at the IBIAS pin
should be greater than 0.55 V, as specified by the minimum
IBIAS compliance specification in Table 1.
Assuming that the voltage drop across the 50 Ω transmission lines
is negligible and that V
The maximum voltage at the IBIAS pin must be less than the
maximum IBIAS compliance specification as described by
For this example,
To calculate the headroom at the modulation current pins
(IMODP and IMODN), the voltage has a dc component equal
to VCC due to the ac-coupled configuration and a swing equal
to IMOD × 50 Ω, as R
ADN2530, the voltage at each modulation output pin should be
within the normal operation region shown in Figure 35.
TOSA
F
LA
is the forward voltage across the laser at low current.
F
Headroom calculations for IBIAS, IMODP, and IMODN pins.
Calculation of the typical voltage required at the BSET
and MSET pins to produce the desired bias and
modulation currents.
Calculations of the IBIAS monitor accuracy over the IBIAS
current range.
is the dc voltage drop across L5, L6, L7, and L8.
V
V
V
V
V
V
= 1.2 V, IBIAS = 10 mA, IMOD = 10 mA, and VCC = 3.3 V.
is the resistance of the TOSA.
IBIAS
IBIAS
IBIAS
COMPLIANCE_MAX
COMPLIANCE_MAX
IBIAS
= VCC − V
= 3.3 − 1.2 − (0.01 × 60) = 1.5 V
= 1.5 V > 0.55 V , which satisfies the requirement
= 1.5 V < 2.33 V , which satisfies the requirement
= VCC − 0.75 − 22 × IBIAS (A)
= VCC – 0.75 − 22 × 0.01 = 2.33 V
F
LA
TOSA
− ( IBIAS × R
= 0 V, V
< 100 Ω. For proper operation of the
F
= 1.2 V, and IBIAS = 10 mA,
TOSA
) − V
LA
Rev. A | Page 16 of 20
Assuming the dc voltage drop across L1, L2, L3, and L4 = 0 V
and IMOD = 10 mA, the minimum voltage at the modulation
output pins is equal to
The maximum voltage at the modulation output pins is equal to
Headroom calculations must be repeated for the minimum and
maximum values of the required IBIAS and IMOD ranges to
ensure proper device operation over all operating conditions.
BSET and MSET Pin Voltage Calculation
To set the desired bias and modulation currents, the BSET and
MSET pins of the ADN2530 must be driven with the appropriate
dc voltage. The voltage range required at the BSET pin to generate
the required IBIAS range can be calculated using the BSET voltage
to IBIAS gain specified in Table 1. Assuming that IBIAS = 10 mA
and the typical IBIAS/V
is given by
The BSET voltage range can be calculated using the required
IBIAS range and the minimum and maximum BSET voltage to
IBIAS gain values specified in Table 1.
The voltage required at the MSET pin to produce the desired
modulation current can be calculated using
where K is the MSET voltage to IMOD ratio.
The value of K depends on the actual resistance of the TOSA
and can be obtained from Figure 34. For a TOSA resistance of
60 Ω, the typical value of K = 24 mA/V. Assuming that IMOD =
10 mA and using the preceding equation, the MSET voltage is
given by
The MSET voltage range can be calculated using the required
IMOD range and the minimum and maximum K values. These can
be obtained from the minimum and maximum curves in Figure 34.
VCC − ( IMOD × 50)/2 = VCC − 0.25
VCC − 0.25 > VCC − 0.7 V, which satisfies the requirement
VCC + ( IMOD × 50)/2 = VCC + 0.25
VCC + 0.25 < VCC + 0.7 V, which satisfies the requirement
V
V
V
BSET
MSET
MSET
=
=
=
IBIAS
IMOD
IMOD
20
24
K
mA/V
mA/V
(mA)
(mA)
BSET
=
=
ratio of 20 mA/V, the BSET voltage
10
20
10
24
=
=
0
5 .
. 0
42
V
V