MBM29PL160TD-90PF Meet Spansion Inc., MBM29PL160TD-90PF Datasheet - Page 20

• Manufacturer Part Number: MBM29PL160TD-90PF
• Description: Page Mode Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit
• Manufacturer: Meet Spansion Inc.

20
MBM29PL160TD/BD
■ COMMAND DEFINITIONS
Read/Reset Command
Autoselect Command
Word/Byte Programming
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in an improper sequence will reset the device to the
read mode. "MBM29PL160TD/BD Standard Command Definitions Table" in ■DEVICE BUS OPERATIONS
defines the valid register command sequences. Note that the Erase Suspend (B0h) and Erase Resume (30h)
commands are valid only while the Sector Erase operation is in progress. Moreover both Read/Reset commands
are functionally equivalent, resetting the device to the read mode. Please note that commands are always written
at DQ
In order to return from Autoselect mode or Exceeded Timing Limits (DQ
operation is initiated by writing the Read/Reset command sequence into the command register. Microprocessor
read cycles retrieve array data from the memory. The device remains enabled for reads until the command
register contents are altered.
The device will automatically power-up in the Read/Reset state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that no
spurious alteration of the memory contents occurs during the power transition. Refer to “Read Only Operations
Characteristics” in ■AC CHARACTRISTICS and ■TIMING DIAGRAM for specific timing parameters. (See "(1)
AC Waveforms for Read Operations" and “(2) AC Waveforms for Page Read Mode Operations” in ■TIMING
DIAGRAM.)
Flash memories are intended for use in applications where the local CPU alters memory contents. As such,
manufactures and device codes must be accessible while the device resides in the target system. PROM
programmers typically access the signature codes by raising A
voltage onto the address lines is not generally desired system design practice.
The device contains an Autoselect command operation to supplement traditional PROM programming
methodology. The operation is initiated by writing the Autoselect command sequence into the command register.
Following the last command write, a read cycle from address XX00h retrieves the manufacture code of 04h. A
read cycle from address XX01h for ×16 (XX02h for ×8) retrieves the device code (MBM29PL160TD = 27h and
MBM29PL160BD = 45h for ×8 mode; MBM29PL160TD = 2227h and MBM29PL160BD = 2245h for ×16 mode).
(See "MBM29PL160TD/BD Sector Protection Verify Autoselect Code Table" and "Expanded Autoselect Code
Table" in ■DEVICE BUS OPERATIONS.)
All manufactures and device codes will exhibit odd parity with DQ
The sector state (protection or unprotection) will be indicated by address XX02h for ×16 (XX04h for ×8).
Scanning the sector addresses (A
a logical “1” at device output DQ
mode verification on the protected sector. (See "MBM29PL160TD/BD User Bus Operation Tables (BYTE = V
and BYTE = V
To terminate the operation, it is necessary to write the Read/Reset command sequence into the register, and
also to write the Autoselect command during the operation, by executing it after writing the Read/Reset command
sequence.
The device is programmed on a byte-by-byte (or word-by-word) basis. Programming is a four bus cycle operation.
There are two “unlock” write cycles. These are followed by the program set-up command and data write cycles.
Addresses are latched on the falling edge of CE or WE, whichever happens later and the data is latched on the
rising edge of CE or WE, whichever happens first. The rising edge of the last CE or WE (whichever happens
first) begins programming. Upon executing the Embedded Program Algorithm command sequence, the system
is not required to provide further controls or timings. The device will automatically provide adequate internally
generated program pulses and verify the programmed cell margin. (See "(3) AC Waveforms for Alternate WE
7
to DQ
0
IL
and DQ
)" in ■DEVICE BUS OPERATIONS.)
15
to DQ
8
0
bits are ignored.
for a protected sector. The programming verification should be perform margin
19
, A
Retired Product DS05-20872-4E_July 31, 2007
18
, A
-75/90
17
, A
16
, A
15
, A
14
, A
13
, and A
9
to a high voltage. However, multiplexing high
7
defined as the parity bit.
12
) while (A
5
= 1) to read mode, the read/reset
6
, A
1
, A
0
) = (0, 1, 0) will produce
IH