MBM30LV0064 Fujitsu Microelectronics, Inc., MBM30LV0064 Datasheet - Page 11

• Manufacturer Part Number: MBM30LV0064
• Description: Flash Memory 64m 8m X 8 Bit Nand-type
• Manufacturer: Fujitsu Microelectronics, Inc.

Page Program: 80h, 10h
Block Erase: 60h
I/O0 to I/O7
I/O0 to I/O7
The device is programmed either by the page or partial page. Programming is done by issuing the 80h command
followed by three address cycles then serial data input. The 80h command may be preceded by either 00h, 01h
or 50h to set the pointer to either the first half page, second half page, or spare area respectively. If the pointer
command is not specifically issued, its location is determined by its previous use (see Application Note (2) ).
After the serial data input, any column address which did not receive new data will not be programmed. This
enables a page to be partially programmed. After the data has been entered, the 10h command will initiate the
embedded programming process. If the 10h command is issued without loading any new data, programming
will not be initiated. A given page may not be partially programmed more than ten consecutive times without an
intervening erase operation. During the programming cycle, the R/B pin or Status Register bit I/O6 may be used
to monitor the completion of the programming cycle. Only the Reset and Read Status commands are valid while
programming is in progress. After programming, the Status Register bit I/O0 should be checked to verify whether
the procedure was successful or not.
The device data is erased in a block consisting of sixteen pages. The erase operation begins with the 60h
command followed by two address cycles in which the block to be erased is entered. While the two address
cycles require A
the D0h command is entered to initiate the erase operation. The R/B signal may be used to monitor the completion
of the cycle. Upon completion, the Status Register bit I/O0 should be used to verify a successful erase.
R/B
R/B
22
to A
80h
60h
9
to be entered, A
Address and Data Input
Address Input
12
Figure 5
to A
Figure 6
9
are don’t care bits. Once the block address is successfully loaded,
Page Program
Block Erase
D0h
10h
70h
70h
MBM30LV0064
0 = Pass
1 = Fail
0 = Pass
1 = Fail
I/O0
I/O0
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