IS61LV256AL Integrated Silicon Solution, Inc., IS61LV256AL Datasheet - Page 5
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IS61LV256AL
Manufacturer Part Number
IS61LV256AL
Description
32k X 8 Low Voltage Cmos Static Ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
1.IS61LV256AL.pdf
(13 pages)
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READ CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST LOADS
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
10/23/06
AC TEST CONDITIONS
IS61LV256AL
Symbol
t
t
t
t
t
t
t
t
t
t
t
and output loading specified in Figure 1.
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
OUTPUT
(3)
(3)
(2)
(2)
(2)
(2)
3.3V
Including
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
CE to Low-Z Output
CE to High-Z Output
CE to Power-Up
CE to Power-Down
jig and
scope
Figure 1.
30 pF
319 Ω
353 Ω
See Figures 1 and 2
0V to 3.0V
1.5V
Unit
3 ns
Min.
OUTPUT
10
—
—
—
—
—
—
2
0
3
0
-10 ns
3.3V
Max.
—
10
—
10
—
—
—
10
5
5
5
(1)
Including
(Over Operating Range)
jig and
scope
5 pF
Figure 2.
319 Ω
Min.
12
—
—
—
—
—
—
2
0
3
0
-12 ns
Max.
12
12
12
—
—
—
—
—
6
5
5
353 Ω
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ISSI
®
5