RDK-239 Power Integrations, Inc., RDK-239 Datasheet - Page 15

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RDK-239

Manufacturer Part Number
RDK-239
Description
Specifications: Family: Eval Boards - DC/DC & AC/DC (Off-Line) SMPS ; Series: HiperLCS™ ; Main Purpose: DC/DC, Step Down ; Outputs and Type: 1, Isolated ; Power - Output: 150W ; Voltage - Output: 24V ; Current - Output: 6.25A ; Voltage - Input:
Manufacturer
Power Integrations, Inc.
Datasheet
start-up frequency, and f
(lower) threshold frequency.
The FEEDBACK pin current at start-up is determined by the value
of R
start-up peak currents, this current should match or slightly
exceed the DT/BF pin current so that start-up switching frequency
begins at f
10% lower than the value of the pull-up resistor on the DT/BF pin.
The frequency will slide down as C
smaller than that which provides start-up at f
additional delay before start-up switching. Please see the PIXls
HiperLCS spreadsheet.
Resistor R
up the large signal transient response during burst mode. The
recommended value is ~4.7 kW. Diode D1 prevents R
loading R
omitted and a combination of resistor values found to achieve the
desired f
R
also improves burst mode output ripple voltage. Its maximum
value must be such that the FEEDBACK pin current is equal to
the DT/BF pin current when the optocoupler is in saturation and
the FEEDBACK pin is at 2.0 V (please see PIXls HiperLCS
spreadsheet). This is to ensure that if the HiperLCS does not exit
start-up mode, because the feedback loop did not allow the
switching frequency to drop below f
light load by bursting at f
lead to high internal dissipation due to loss of ZVS and should be
avoided. See Figure 20.
Capacitor C
that exhibits a 7 consecutive-cycle peak current at start-up that is
just below the peak current measured at brown-out and full load.
A larger value will slow down start-up and will make it more likely
that f
when the HiperLCS is powered up at high-line and minimum load,
and may subsequently cause the HiperLCS to burst at f
instead of between f
Figure 19. Feedback Network Shown with Additional Load Resistor.
www.powerint.com
OPTO
START
STOP
will improve the ESD and surge immunity of the PSU. It
VREF
GND
because the voltage on C
MIN
is not reached. This can prevent exiting start-up mode
FMIN
FB
LOAD
MAX
but the resulting tolerances will be poor. Resistor
START
. The resulting value of R
when the optocoupler is cut off. Diode D1 can be
provides a load on the optocoupler, and speeds
should be sized at the minimum possible value
C
START
START
4.7 nF
C
MAX
FB
START
and f
. Note however bursting at f
, which is the burst mode start
STOP
.
R
R
START
START
FMIN
START
STOP
R
OPTO
START
, then it can regulate at
will be zero. For minimum
charges. If R
3.4 V
PI-6118-051711
will be approximately
MAX
D1
, it will create an
START
LOAD
R
MAX
MAX
U1B
LOAD
is
from
can
In order to calculate R
which describes nominal resistance from FEEDBACK pin to
VREF pin, vs. frequency:
Where R
To calculate the minimum R
use the above equation with f = f
dead-time and f
To set f
0.93 is to ensure that, despite the worst case frequency tolerance
of -7%, the frequency can go below f
at V
Using the resulting calculated value for R
The sum of R
Figure 21. VREF to FB External Resistance vs. Frequency.
Figure 20. Bursting at f
300
100
BROWNOUT
50
20
10
4
20
MIN
FB
, use the above equation with f = f
is in kW and f is in kHz.
I
ZVS and Should be Avoided.
.
PRI
FMIN
~850 kHz
MAX
and R
R
.
Bursting Duty ≈ 50%
FB
50
MAX
FMIN
V
=
R
START
HB
Causes High Internal Dissipation Due to Loss of
FMIN
and R
f
Frequency (kHz)
^
0 6041 0 1193
START
determines f
=
.
100
R
START
, which produces start-up at f
MAX
FB
+
3574
LCS700-708
-
Severe Loss of ZVS
.
, use the following equation
from the equation relating
MIN
R
200
START
, guaranteeing regulation
#
MIN
FB
LOG f
, calculate R
.
MIN
^
hh
× 0.93. Where
850 ns / div
10 s / div
500
FMIN
Rev. B 062011
:
15
1000
MAX
,

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