FM24C16B Ramtron, FM24C16B Datasheet
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FM24C16B
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FM24C16B Summary of contents
Page 1
... No write delays are incurred. Data is written to the memory array in the cycle after it has been successfully transferred to the device. The next bus cycle may commence immediately without the need for data polling. The FM24C16B is capable of 12 supporting 10 read/write cycles million times more write cycles than EEPROM ...
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... Write Protect: When WP is high, the entire array is write-protected. When WP is low, all addresses may be written. This pin is internally pulled down. Supply Voltage (5V) Ground No connect FM24C16B - 16Kb 5V I2C F-RAM 256 x 64 FRAM Array 8 Data Latch Page ...
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... Overview The FM24C16B is a serial FRAM memory. The memory array is logically organized as a 2,048 x 8 memory array and is accessed using an industry standard two-wire interface. Functional operation of the FRAM is similar to serial EEPROMs. The major difference between the FM24C16B and a serial EEPROM with the same pinout relates to its superior write performance ...
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... If the receiver acknowledges the last byte, this will cause the FM24C16B to attempt to drive the bus on the next clock while the master is sending a new command such as a Stop. ...
Page 5
... All data transfer occurs MSB (most significant bit) first. Rev. 1.3 July 2011 Page Memory Operation Select The FM24C16B is designed to operate in a manner very similar to other 2-wire interface memory products. The major differences result from the R/W higher performance write capability of FRAM technology ...
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... FM24C16B should read out the next sequential byte. There are four ways to properly terminate a read operation. Failing to properly terminate the read will most likely create a bus contention as the FM24C16B Rev. 1.3 July 2011 Start Address & Data ...
Page 7
... Therefore, endurance cycles are applied for each read or write cycle. The memory architecture is based on an array of rows and columns. Each read or write access causes an endurance cycle for an entire row. In the FM24C16B, a row is 64 bits wide. Every 8-byte boundary marks 19 July 2011 Start ...
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... IH 0. -0.3V and V , other inputs Stop command issued Does not apply to WP pin FM24C16B - 16Kb 5V I2C F-RAM Ratings -1.0V to +7.0V -1.0V to +7.0V SS and V < V +1. -55C to +125C 260 C 4kV 1.25kV 100V MSL-1 Typ Max Units 5 ...
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... 5V) DD Parameter Max min -40C to +85 4.5V to 5.5V unless otherwise specified min) to First Access (Start condition) DD min) DD waveform. DD FM24C16B - 16Kb 5V I2C F-RAM Min Max Min Max Units 0 400 0 1000 kHz s 1.3 0.6 s 0.6 0.4 s 0.9 0.55 s 1.3 0.5 s 0.6 0.25 ...
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... HIGH BUF t AA Stop Start t t HD:STA t SU:STO Stop Start Start Min FM24C16B - 16Kb 5V I2C F-RAM Equivalent AC Load Circuit 5.5V 1700 Output 100 LOW 1/fSCL t HD:DAT t SU:DAT t DH Acknowledge t HD:DAT t SU:DAT AA Acknowledge Max Units ...
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... Legend: XXXXXX= part number, P= package type R=rev code, LLLLLLL= lot code RIC=Ramtron Int‟l Corp, YY=year, WW=work week Example: FM24C16B, “Green” SOIC package, Year 2010, Work Week 49 FM24C16B-G A00002G1 RIC1049 FM24C16B - 16Kb 5V I2C F-RAM Recommended PCB Footprint 7.70 3.70 2.00 0.65 1.27 0.25 0.50 0.19 45 ...
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... Revision History Revision 1.0 11/10/2010 1.1 12/20/2010 1.2 2/15/2011 1.3 7/19/2011 Rev. 1.3 July 2011 Date Summary Initial Release Changed V (max Changed t and t spec limits Added ESD ratings. FM24C16B - 16Kb 5V I2C F-RAM +0.3V. Page Datasheet pdf - http://www.DataSheet4U.net/ ...