T7256 Agere Systems, T7256 Datasheet - Page 14

• Manufacturer Part Number: T7256
• Description: (T7234 - T7256) Compliance
• Manufacturer: Agere Systems

T7234 Single-Chip NT1 (SCNT1) Euro-LITE Transceiver
S/T-Interface Frame Structure
The S/T-interface transfers its subscriber line 2B+D
information as a 192 kbits/s full-duplex signal grouped
into frames of 48 bits with a period of 250 s, as speci-
fied in the ITU-T I.430/ANSI T1.605 standard. Thirty-six
of the 48 bits sent in each direction convey user infor-
mation (two 8-bit occurrences of each of the two B
channels, and four D-channel bits). The remaining
12 bits per frame are used for framing, control, dc bal-
ance, and maintenance. The frame structures are
shown in each direction in Figure 5.
In the bit stream transmitted from the terminal endpoint
(TE) to the network termination (NT), 4 bits are used for
framing (F and FA, each with a dc balancing bit L),
eight additional L bits are used to balance the 32 B-
channel bits, and 4 bits are D-channel bits.
For the NT-to-TE transmission, 4 bits (F with dc balanc-
ing bit L, FA, and N) are used for framing, one M bit
marks the start of a 20-frame multiframe, four E bits
10
FRAME
FRAME
NT-TO-
TE-TO-
NT
TE
F L
F L
B1 BITS
EIGHT
B1 BITS
EIGHT
E D A FA N
Figure 5. Frame Structures of NT and TE Frames
L D
L FA L
ONE FRAME = 48 bits IN 250 s
B2 BITS
EIGHT
B2 BITS
EIGHT
BANDWIDTH = 192 kbits/s
E D M
form an echo channel for retransmission of the D-chan-
nel bits received from the TE, one additional L bit is
used to balance the contents of the entire frame, and
1 bit (A) is set to one when bit synchronization is
achieved between TE and NT as part of the INFO 4
state. One S bit is used for transmitting S-subchannel
messages in an NT-to-TE multiframe.
The framing procedure uses bipolar line-code viola-
tions to establish synchronization. Since the last binary
0 of any frame is a positive pulse and the F bit is also
defined to be a positive pulse (see Figure 6), the first bit
of each frame represents a coding violation. In addi-
tion, the second bit of each frame, a balance bit, is a
negative pulse, and the next binary 0 in the frame is
forced to be negative, causing another violation. Both
bipolar violations allow framing and provide dc balance.
All other pulses follow the alternating convention.
L D L
B1 BITS
EIGHT
B1 BITS
EIGHT
E D S
L D L
B2 BITS
Lucent Technologies Inc.
EIGHT
B2 BITS
February 1998
EIGHT
E D
L
L D
5-2479 (C)
L