CMOS SDRAM Samsung Electronics, CMOS SDRAM Datasheet - Page 9

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CMOS SDRAM

Manufacturer Part Number
CMOS SDRAM
Description
CMOS SDRAM Device Operations
Manufacturer
Samsung Electronics
Datasheet
DEVICE OPERATIONS
3. CAS Interrupt (I)
*Note : 1. By " Interrupt", It is meant to stop burst read/write by external command before the end of burst.
1) Read interrupted by Read (BL=4)
2) Write interrupted by Write (BL=2)
DQ(CL2)
DQ(CL3)
2. t
3. t
CMD
CMD
ADD
CLK
ADD
CLK
DQ
By "CAS Interrupt", to stop burst read/write by CAS access ; read and write.
CCD
CDL
ELECTRONICS
: Last data in to new column address delay. (=1CLK)
: CAS to CAS delay. (=1CLK)
DA
WR
RD
A
A
tCCD
Note 2
tCCD
tCDL
Note 3
0
DB
WR
RD
B
B
0
Note 2
Note 1
QA
DB
0
1
QB
QA
0
0
QB
QB
1
0
QB
QB
2
1
QB
QB
3
2
QB
DQ(CL2)
DQ(CL3)
3
3) Write interrupted by Read (BL=2)
CMD
CLK
ADD
DA
DA
WR
A
tCCD
0
0
tCDL
Note 3
RD
B
Note 2
QB
0
Rev. 0.2 Sep. 1999
CMOS SDRAM
QB
QB
0
1
QB
1

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