S1D1 Epson Electronics America, Inc., S1D1 Datasheet - Page 146

• Manufacturer Part Number: S1D1
• Description: LCD Controller-driver With Built-in Character ROM
• Manufacturer: Epson Electronics America, Inc.

S1D15300 Series
5–22
Sleep mode
This mode stops every operation of the LCD display system,
and can reduce current consumption nearly to a static current
value if no access is made from the microprocessor. The
internal status in the sleep mode is as follows:
(1) Stops the oscillator circuit and LCD power supply circuit.
(2) Stops the LCD drive and outputs the VDD level as the
(3) Holds the display data and operation mode provided before
(4) The MPU can access to the built-in display RAM.
Standby mode
Stops the operation of the duty LCD display system and turns
on only the static drive system to reduce current consumption
to the minimum level required for static drive.
The ON operation of the static drive system indicates that the
S1D15300 series is in the standby mode. The internal status in
the standby mode is as follows:
(1) Stops the LCD power supply circuit.
(2) Stops the LCD drive and outputs the VDD level as the
(3) Holds the display data and operation mode provided before
(4) The MPU can access to the built-in display RAM.
When the LCD drive voltage level is given by an external
resistive driver, the current of this resistor must be cut so that it
may be fixed to floating or V
with causing the S1D15300 series to go to the sleep mode or
standby mode.
segment/common driver output.
the start of the sleep mode.
segment/common driver output. However, the static drive
system operates.
the start of the standby mode.
When the RESET command is issued in the standby mode,
the sleep mode is set.
DD
level, prior to or concurrently
EPSON
(20) Test Command
A0
0
When an external power supply is used, likewise, the function
of this external power supply must be stopped so that it may be
fixed to floating or V
causing the S1D15300 series to go to the sleep mode or standby
mode.
When the common driver S1D16305 or S1D16501 is combined
with the S1D15301 in the configuration, the DOF pin of the
S1D15301 must be connected to the DOFF pin of the S1D16305
or S1D16501.
This is the dedicate IC chip test command. It must not be used
for normal operation. If the Test command is issued errone-
ously, set the -RES input to low or issue the Reset command to
release the test mode.
* : Invalid bit
Cautions: The S1D15300 Series holds an operation status
RD WR D7
E
1
R/W
0
specified by each command. However, the internal
operation status may be changed by a high level of
ambient noise. It must be considered to suppress the
noise on the its package and system or to prevent an
ambient noise insertion. To prevent a spike noise, a
built-in software for periodical status refreshment is
recommended to use.
The test command can be inserted in an unexpected
place. Therefore, it is recommended to enter the test
mode reset command F0h during the refresh
sequence.
1
D6
1
DD
level, prior to or concurrently with
D5
1
D4
1
D3
D2
D1
Rev.1.4
D0