S1D1 Epson Electronics America, Inc., S1D1 Datasheet - Page 16
S1D1
Manufacturer Part Number
S1D1
Description
LCD Controller-driver With Built-in Character ROM
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D1.pdf
(612 pages)
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S1D15100 Series
7. FUNCTIONAL DESCRIPTION
Command/Data Register
Command Decoder
Display Data Memory
The format of the 32
following figure.
Each 8-bit display data byte loaded from the command/
data register is stored in two consecutive addresses as
shown in the following figure. The upper four bits are
stored at the location specified by the address counter,
and the lower four bits, at the next location. The address
counter is automatically incremented by two.
1–4
The command/data register consists of an 8-bit serial
register and a 3-bit CK counter.
When CS input changes from the HIGH level to the
LOW level, S1D15100 Serise comes to accept SI
inputs. Also, the CK counter is initialized when CS
input changes from the HIGH level to the LOW level.
S1D15100 Serise always accepts SI inputs. When the
built-in timing generator (CR oscillator) starts
oscillating, the CK counter is initialized.
The serial register takes in serial data D7, D6, ... D0 in
this order from the SI terminal on the rising edge of the
CK. At the same time, the CK counter starts counting
the serial clock. The CK counter, when counting 8 on
the serial clock, returns to the initial state.
So, serial data is taken in to the serial register in 8 bits
and is processed.
When the command/data register data specifies any
command (when C/D input is HIGH level when serial
data is input), the command decoder takes in and
decode the data of the command/data register to control
S1D15100F00C
C/D
CS
CK
*
SI
.
4-bit memory is shown in the
Bit
0
1
2
3
D7
1
0
1
D6
2
2
3
D5
3
4
5
EPSON
D4
Address
4
6
7
D3
5
8
When the CK counter counts 8 of shift clock input (CK
input) (reads the input 8-bit serial data), the serial data
taken in the command/data register is output to the
display data memory (RAM) if the input serial data is
a display data, or is output to the command decoder if
it is a command data.
S1D15100 Serise identifies input serial data (SI input)
as display data or command data judging from C/D
input. It displays display data when C/D input is LOW
level or command data when the input is HIGH level.
S1D15100 Serise reads and identifies C/D input at the
timing on the rising edge of 8xn of shift clock input
(CK input) from the CS = LOW level. (n=1, 2, 3, ...)
Bit 3
D7
D2
Current address
6
D6
29
30
D5
D1
7
31
Bit 0
D4
D0
8
Bit 3
D3
Current address + 1
D2
D1
Rev. 1.0
Bit 0
D0
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