IDT82V2082 Integrated Device Technology, Inc., IDT82V2082 Datasheet - Page 51

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IDT82V2082

Manufacturer Part Number
IDT82V2082
Description
2Ch T1/J1/E1 Short Haul/long Haul Liu
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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DUAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
Table-48 INTES: Interrupt Trigger Edge Select Register
IBLBA_IES
IBLBD_IES
PRBS_IES
TCLK_IES
LOS_IES
AIS_IES
Symbol
EQ_IES
DF_IES
(R/W, Address = 15H, 35H)
Bit
6
5
4
7
3
2
1
0
Default
0
0
0
0
0
0
0
0
This bit determines the Inband Loopback Activate Code interrupt event.
This bit determines the Inband Loopback Deactivate Code interrupt event.
This bit determines the PRBS/QRSS synchronization status interrupt event.
This bit determines the Equalizer out of range interrupt event.
= 0: Interrupt event is generated as a ‘0’ to ‘1’ transition of the EQ_S bit in the STAT0 status register
= 1: Interrupt event is generated as either a ‘0’ to ‘1’ transition or a ‘1’ to ‘0’ transition of the EQ_S bit in the STAT0
status register.
= 0: Interrupt event is generated as a ‘0’ to ‘1’ transition of the IBLBA_S bit in STAT0 status register
= 1: Interrupt event is generated as either a ‘0’ to ‘1’ transition or a ‘1’ to ‘0’ transition of the IBLBA_S bit in STAT0
status register
= 0: Interrupt event is generated as a ‘0’ to ‘1’ transition of the IBLBD_S bit in STAT0 status register
= 1: Interrupt event is generated as either a ‘0’ to ‘1’ transition or a ‘1’ to ‘0’ transition of the IBLBD_S bit in STAT0
status register
= 0: Interrupt event is generated as a ‘0’ to ‘1’ transition of the PRBS_S bit in STAT0 status register
= 1: Interrupt event is generated as either a ‘0’ to ‘1’ transition or a ‘1’ to ‘0’ transition of the PRBS_S bit in STAT0
status register
This bit determines the TCLK Loss interrupt event.
= 0: Interrupt event is generated as a ‘0’ to ‘1’ transition of the TCLK_LOS bit in STAT0 status register
= 1: Interrupt event is generated as either a ‘0’ to ‘1’ transition or a ‘1’ to ‘0’ transition of the TCLK_LOS bit in STAT0
status register
This bit determines the Driver Failure interrupt event.
= 0: Interrupt event is generated as a ‘0’ to ‘1’ transition of the DF_S bit in STAT0 status register
= 1: Interrupt event is generated as either a ‘0’ to ‘1’ transition or a ‘1’ to ‘0’ transition of the DF_S bit in STAT0 status
register
This bit determines the AIS interrupt event.
= 0: Interrupt event is generated as a ‘0’ to ‘1’ transition of the AIS_S bit in STAT0 status register
= 1: Interrupt event is generated as either a ‘0’ to ‘1’ transition or a ‘1’ to ‘0’ transition of the AIS_S bit in STAT0 status
register
This bit determines the LOS interrupt event.
= 0: Interrupt is generated as a ‘0’ to ‘1’ transition of the LOS_S bit in STAT0 status register
= 1: Interrupt is generated as either a ‘0’ to ‘1’ transition or a ‘1’ to ‘0’ transition of the LOS_S bit in STAT0 status
register
51
Description
TEMPERATURE RANGES
INDUSTRIAL

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